Sve2 Classe
Definição
Importante
Algumas informações dizem respeito a um produto pré-lançado que pode ser substancialmente modificado antes de ser lançado. A Microsoft não faz garantias, de forma expressa ou implícita, em relação à informação aqui apresentada.
Importante
Esta API não está em conformidade com CLS.
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos
public ref class Sve2 abstract : System::Runtime::Intrinsics::Arm::Sve
[System.CLSCompliant(false)]
[System.Diagnostics.CodeAnalysis.Experimental("SYSLIB5003", UrlFormat="https://aka.ms/dotnet-warnings/{0}")]
public abstract class Sve2 : System.Runtime.Intrinsics.Arm.Sve
[<System.CLSCompliant(false)>]
[<System.Diagnostics.CodeAnalysis.Experimental("SYSLIB5003", UrlFormat="https://aka.ms/dotnet-warnings/{0}")>]
type Sve2 = class
inherit Sve
Public MustInherit Class Sve2
Inherits Sve
- Herança
- Atributos
Propriedades
| Name | Description |
|---|---|
| IsSupported |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
Métodos
| Name | Description |
|---|---|
| AbsoluteDifferenceAdd(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svaba[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) UABA Ztied1.B, Zop2.B, Zop3.B |
| AbsoluteDifferenceAdd(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svaba[_s16](svint16_t op1, svint16_t op2, svint16_t op3) SABA Ztied1.H, Zop2.H, Zop3.H |
| AbsoluteDifferenceAdd(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svaba[_s32](svint32_t op1, svint32_t op2, svint32_t op3) SABA Ztied1.S, Zop2.S, Zop3.S |
| AbsoluteDifferenceAdd(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svaba[_s64](svint64_t op1, svint64_t op2, svint64_t op3) SABA Ztied1.D, Zop2.D, Zop3.D |
| AbsoluteDifferenceAdd(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svaba[_s8](svint8_t op1, svint8_t op2, svint8_t op3) SABA Ztied1.B, Zop2.B, Zop3.B |
| AbsoluteDifferenceAdd(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svaba[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) UABA Ztied1.H, Zop2.H, Zop3.H |
| AbsoluteDifferenceAdd(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svaba[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) UABA Ztied1.S, Zop2.S, Zop3.S |
| AbsoluteDifferenceAdd(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svaba[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) UABA Ztied1.D, Zop2.D, Zop3.D |
| AbsoluteDifferenceWideningEven(Vector<Byte>, Vector<Byte>) |
svuint16_t svabdlb[_u16](svuint8_t op1, svuint8_t op2) UABDLB Zresult.H, Zop1.B, Zop2.B |
| AbsoluteDifferenceWideningEven(Vector<Int16>, Vector<Int16>) |
svint32_t svabdlb[_s32](svint16_t op1, svint16_t op2) SABDLB Zresult.S, Zop1.H, Zop2.H |
| AbsoluteDifferenceWideningEven(Vector<Int32>, Vector<Int32>) |
svint64_t svabdlb[_s64](svint32_t op1, svint32_t op2) SABDLB Zresult.D, Zop1.S, Zop2.S |
| AbsoluteDifferenceWideningEven(Vector<SByte>, Vector<SByte>) |
svint16_t svabdlb[_s16](svint8_t op1, svint8_t op2) SABDLB Zresult.H, Zop1.B, Zop2.B |
| AbsoluteDifferenceWideningEven(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svabdlb[_u32](svuint16_t op1, svuint16_t op2) UABDLB Zresult.S, Zop1.H, Zop2.H |
| AbsoluteDifferenceWideningEven(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svabdlb[_u64](svuint32_t op1, svuint32_t op2) UABDLB Zresult.D, Zop1.S, Zop2.S |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svabalb[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SABALB Ztied1.H, Zop2.B, Zop3.B |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svabalb[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SABALB Ztied1.S, Zop2.H, Zop3.H |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svabalb[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SABALB Ztied1.D, Zop2.S, Zop3.S |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svabalb[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UABALB Ztied1.H, Zop2.B, Zop3.B |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svabalb[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UABALB Ztied1.S, Zop2.H, Zop3.H |
| AbsoluteDifferenceWideningLowerAndAddEven(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svabalb[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UABALB Ztied1.D, Zop2.S, Zop3.S |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svabalt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SABALT Ztied1.H, Zop2.B, Zop3.B |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svabalt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SABALT Ztied1.S, Zop2.H, Zop3.H |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svabalt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SABALT Ztied1.D, Zop2.S, Zop3.S |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svabalt[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UABALT Ztied1.H, Zop2.B, Zop3.B |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svabalt[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UABALT Ztied1.S, Zop2.H, Zop3.H |
| AbsoluteDifferenceWideningLowerAndAddOdd(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svabalt[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UABALT Ztied1.D, Zop2.S, Zop3.S |
| AbsoluteDifferenceWideningOdd(Vector<Byte>, Vector<Byte>) |
svuint16_t svabdlt[_u16](svuint8_t op1, svuint8_t op2) UABDLT Zresult.H, Zop1.B, Zop2.B |
| AbsoluteDifferenceWideningOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svabdlt[_s32](svint16_t op1, svint16_t op2) SABDLT Zresult.S, Zop1.H, Zop2.H |
| AbsoluteDifferenceWideningOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svabdlt[_s64](svint32_t op1, svint32_t op2) SABDLT Zresult.D, Zop1.S, Zop2.S |
| AbsoluteDifferenceWideningOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svabdlt[_s16](svint8_t op1, svint8_t op2) SABDLT Zresult.H, Zop1.B, Zop2.B |
| AbsoluteDifferenceWideningOdd(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svabdlt[_u32](svuint16_t op1, svuint16_t op2) UABDLT Zresult.S, Zop1.H, Zop2.H |
| AbsoluteDifferenceWideningOdd(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svabdlt[_u64](svuint32_t op1, svuint32_t op2) UABDLT Zresult.D, Zop1.S, Zop2.S |
| AbsSaturate(Vector<Int16>) |
svint16_t svqabs[_s16]_m(svint16_t inativo, svbool_t pg, svint16_t op) svint16_t svqabs[_s16]_x(svbool_t pg, svint16_t op) svint16_t svqabs[_s16]_z(svbool_t pg, svint16_t op) SQABS Ztied.H, pg/M, Zop.H SQABS Ztied.H, pg/M, Ztied.H |
| AbsSaturate(Vector<Int32>) |
svint32_t svqabs[_s32]_m(svint32_t inativo, svbool_t pg, svint32_t op) svint32_t svqabs[_s32]_x(svbool_t pg, svint32_t op) svint32_t svqabs[_s32]_z(svbool_t pg, svint32_t op) SQABS Ztied.S, pg/M, Zop.S SQABS Ztied.S, pg/M, Ztied.S |
| AbsSaturate(Vector<Int64>) |
svint64_t svqabs[_s64]_m(svint64_t inativo, svbool_t pg, svint64_t op) svint64_t svqabs[_s64]_x(svbool_t pg, svint64_t op) svint64_t svqabs[_s64]_z(svbool_t pg, svint64_t op) SQABS Ztied.D, Pg/M, Zop.D SQABS Ztied.D, Pg/M, Ztied.D |
| AbsSaturate(Vector<SByte>) |
svint8_t svqabs[_s8]_m(svint8_t inativo, svbool_t pg, svint8_t op) svint8_t svqabs[_s8]_x(svbool_t pg, svint8_t op) svint8_t svqabs[_s8]_z(svbool_t pg, svint8_t op) SQABS Ztied.B, Pg/M, Zop.B SQABS Ztied.B, Pg/M, Ztied.B |
| AddCarryWideningEven(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svadclb[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) ADCLB Ztied1.S, Zop2.S, Zop3.S |
| AddCarryWideningEven(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svadclb[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) ADCLB Ztied1.D, Zop2.D, Zop3.D |
| AddCarryWideningOdd(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svadclt[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) ADCLT Ztied1.S, Zop2.S, Zop3.S |
| AddCarryWideningOdd(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svadclt[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) ADCLT Ztied1.D, Zop2.D, Zop3.D |
| AddHighNarrowingEven(Vector<Int16>, Vector<Int16>) |
svint8_t svaddhnb[_s16](svint16_t op1, svint16_t op2) ADDHNB Zresult.B, Zop1.H, Zop2.H |
| AddHighNarrowingEven(Vector<Int32>, Vector<Int32>) |
svint16_t svaddhnb[_s32](svint32_t op1, svint32_t op2) ADDHNB Zresult.H, Zop1.S, Zop2.S |
| AddHighNarrowingEven(Vector<Int64>, Vector<Int64>) |
svint32_t svaddhnb[_s64](svint64_t op1, svint64_t op2) ADDHNB Zresult.S, Zop1.D, Zop2.D |
| AddHighNarrowingEven(Vector<UInt16>, Vector<UInt16>) |
svuint8_t svaddhnb[_u16](svuint16_t op1, svuint16_t op2) ADDHNB Zresult.B, Zop1.H, Zop2.H |
| AddHighNarrowingEven(Vector<UInt32>, Vector<UInt32>) |
svuint16_t svaddhnb[_u32](svuint32_t op1, svuint32_t op2) ADDHNB Zresult.H, Zop1.S, Zop2.S |
| AddHighNarrowingEven(Vector<UInt64>, Vector<UInt64>) |
svuint32_t svaddhnb[_u64](svuint64_t op1, svuint64_t op2) ADDHNB Zresult.S, Zop1.D, Zop2.D |
| AddHighNarrowingOdd(Vector<Byte>, Vector<UInt16>, Vector<UInt16>) |
svuint8_t svaddhnt[_u16](svuint8_t par, svuint16_t op1, svuint16_t op2) ADDHNT Ztied.B, Zop1.H, Zop2.H |
| AddHighNarrowingOdd(Vector<Int16>, Vector<Int32>, Vector<Int32>) |
svint16_t svaddhnt[_s32](svint16_t even, svint32_t op1, svint32_t op2) ADDHNT Ztied.H, Zop1.S, Zop2.S |
| AddHighNarrowingOdd(Vector<Int32>, Vector<Int64>, Vector<Int64>) |
svint32_t svaddhnt[_s64](svint32_t par, svint64_t op1, svint64_t op2) ADDHNT Ztied.S, Zop1.D, Zop2.D |
| AddHighNarrowingOdd(Vector<SByte>, Vector<Int16>, Vector<Int16>) |
svint8_t svaddhnt[_s16](svint8_t even, svint16_t op1, svint16_t op2) ADDHNT Ztied.B, Zop1.H, Zop2.H |
| AddHighNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Vector<UInt32>) |
svuint16_t svaddhnt[_u32](svuint16_t par, svuint32_t op1, svuint32_t op2) ADDHNT Ztied.H, Zop1.S, Zop2.S |
| AddHighNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Vector<UInt64>) |
svuint32_t svaddhnt[_u64](svuint32_t even, svuint64_t op1, svuint64_t op2) ADDHNT Ztied.S, Zop1.D, Zop2.D |
| AddPairwise(Vector<Byte>, Vector<Byte>) |
svuint8_t svaddp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svaddp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| AddPairwise(Vector<Double>, Vector<Double>) |
svfloat64_t svaddp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) svfloat64_t svaddp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| AddPairwise(Vector<Int16>, Vector<Int16>) |
svint16_t svaddp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svaddp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| AddPairwise(Vector<Int32>, Vector<Int32>) |
svint32_t svaddp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svaddp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| AddPairwise(Vector<Int64>, Vector<Int64>) |
svint64_t svaddp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svaddp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| AddPairwise(Vector<SByte>, Vector<SByte>) |
svint8_t svaddp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svaddp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| AddPairwise(Vector<Single>, Vector<Single>) |
svfloat32_t svaddp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) svfloat32_t svaddp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| AddPairwise(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svaddp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svaddp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| AddPairwise(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svaddp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svaddp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| AddPairwise(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svaddp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svaddp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| AddPairwiseWideningAndAdd(Vector<Int16>, Vector<SByte>) |
svint16_t svadalp[_s16]_m(svbool_t pg, svint16_t op1, svint8_t op2) svint16_t svadalp[_s16]_x(svbool_t pg, svint16_t op1, svint8_t op2) svint16_t svadalp[_s16]_z(svbool_t pg, svint16_t op1, svint8_t op2) SADALP Ztied1.H, pg/M, Zop2.B SADALP Ztied1.H, pg/M, Zop2.B |
| AddPairwiseWideningAndAdd(Vector<Int32>, Vector<Int16>) |
svint32_t svadalp[_s32]_m(svbool_t pg, svint32_t op1, svint16_t op2) svint32_t svadalp[_s32]_x(svbool_t pg, svint32_t op1, svint16_t op2) svint32_t svadalp[_s32]_z(svbool_t pg, svint32_t op1, svint16_t op2) SADALP Ztied1.S, pg/M, Zop2.H SADALP ztied1.S, pg/M, Zop2.H |
| AddPairwiseWideningAndAdd(Vector<Int64>, Vector<Int32>) |
svint64_t svadalp[_s64]_m(svbool_t pg, svint64_t op1, svint32_t op2) svint64_t svadalp[_s64]_x(svbool_t pg, svint64_t op1, svint32_t op2) svint64_t svadalp[_s64]_z(svbool_t pg, svint64_t op1, svint32_t op2) SADALP Ztied1.D, pg/M, Zop2.S SADALP Ztied1.D, pg/M, Zop2.S |
| AddPairwiseWideningAndAdd(Vector<UInt16>, Vector<Byte>) |
svuint16_t svadalp[_u16]_m(svbool_t pg, svuint16_t op1, svuint8_t op2) svuint16_t svadalp[_u16]_x(svbool_t pg, svuint16_t op1, svuint8_t op2) svuint16_t svadalp[_u16]_z(svbool_t pg, svuint16_t op1, svuint8_t op2) UADALP Ztied1.H, pg/M, Zop2.B UADALP Ztied1.H, pg/M, Zop2.B |
| AddPairwiseWideningAndAdd(Vector<UInt32>, Vector<UInt16>) |
svuint32_t svadalp[_u32]_m(svbool_t pg, svuint32_t op1, svuint16_t op2) svuint32_t svadalp[_u32]_x(svbool_t pg, svuint32_t op1, svuint16_t op2) svuint32_t svadalp[_u32]_z(svbool_t pg, svuint32_t op1, svuint16_t op2) UADALP Ztied1.S, pg/M, Zop2.H UADALP ztied1.S, pg/M, Zop2.H |
| AddPairwiseWideningAndAdd(Vector<UInt64>, Vector<UInt32>) |
svuint64_t svadalp[_u64]_m(svbool_t pg, svuint64_t op1, svuint32_t op2) svuint64_t svadalp[_u64]_x(svbool_t pg, svuint64_t op1, svuint32_t op2) svuint64_t svadalp[_u64]_z(svbool_t pg, svuint64_t op1, svuint32_t op2) UADALP Ztied1.D, pg/M, Zop2.S UADALP Ztied1.D, pg/M, Zop2.S |
| AddRotateComplex(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svcadd[_u8](svuint8_t op1, svuint8_t op2, uint64_t imm_rotation) CADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation |
| AddRotateComplex(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) CADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation |
| AddRotateComplex(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) CADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation |
| AddRotateComplex(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) CADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation |
| AddRotateComplex(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) CADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation |
| AddRotateComplex(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svcadd[_u16](svuint16_t op1, svuint16_t op2, uint64_t imm_rotation) CADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation |
| AddRotateComplex(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svcadd[_u32](svuint32_t op1, svuint32_t op2, uint64_t imm_rotation) CADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation |
| AddRotateComplex(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svcadd[_u64](svuint64_t op1, svuint64_t op2, uint64_t imm_rotation) CADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation |
| AddRoundedHighNarrowingEven(Vector<Int16>, Vector<Int16>) |
svint8_t svraddhnb[_s16](svint16_t op1, svint16_t op2) RADDHNB Zresult.B, Zop1.H, Zop2.H |
| AddRoundedHighNarrowingEven(Vector<Int32>, Vector<Int32>) |
svint16_t svraddhnb[_s32](svint32_t op1, svint32_t op2) RADDHNB Zresult.H, Zop1.S, Zop2.S |
| AddRoundedHighNarrowingEven(Vector<Int64>, Vector<Int64>) |
svint32_t svraddhnb[_s64](svint64_t op1, svint64_t op2) RADDHNB Zresult.S, Zop1.D, Zop2.D |
| AddRoundedHighNarrowingEven(Vector<UInt16>, Vector<UInt16>) |
svuint8_t svraddhnb[_u16](svuint16_t op1, svuint16_t op2) RADDHNB Zresult.B, Zop1.H, Zop2.H |
| AddRoundedHighNarrowingEven(Vector<UInt32>, Vector<UInt32>) |
svuint16_t svraddhnb[_u32](svuint32_t op1, svuint32_t op2) RADDHNB Zresult.H, Zop1.S, Zop2.S |
| AddRoundedHighNarrowingEven(Vector<UInt64>, Vector<UInt64>) |
svuint32_t svraddhnb[_u64](svuint64_t op1, svuint64_t op2) RADDHNB Zresult.S, Zop1.D, Zop2.D |
| AddRoundedHighNarrowingOdd(Vector<Byte>, Vector<UInt16>, Vector<UInt16>) |
svuint8_t svraddhnt[_u16](svuint8_t par, svuint16_t op1, svuint16_t op2) RADDHNT Ztied.B, Zop1.H, Zop2.H |
| AddRoundedHighNarrowingOdd(Vector<Int16>, Vector<Int32>, Vector<Int32>) |
svint16_t svraddhnt[_s32](svint16_t par, svint32_t op1, svint32_t op2) RADDHNT Ztied.H, Zop1.S, Zop2.S |
| AddRoundedHighNarrowingOdd(Vector<Int32>, Vector<Int64>, Vector<Int64>) |
svint32_t svraddhnt[_s64](svint32_t even, svint64_t op1, svint64_t op2) RADDHNT Ztied.S, Zop1.D, Zop2.D |
| AddRoundedHighNarrowingOdd(Vector<SByte>, Vector<Int16>, Vector<Int16>) |
svint8_t svraddhnt[_s16](svint8_t even, svint16_t op1, svint16_t op2) RADDHNT Ztied.B, Zop1.H, Zop2.H |
| AddRoundedHighNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Vector<UInt32>) |
svuint16_t svraddhnt[_u32](svuint16_t par, svuint32_t op1, svuint32_t op2) RADDHNT Ztied.H, Zop1.S, Zop2.S |
| AddRoundedHighNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Vector<UInt64>) |
svuint32_t svraddhnt[_u64](svuint32_t even, svuint64_t op1, svuint64_t op2) RADDHNT Ztied.S, Zop1.D, Zop2.D |
| AddSaturate(Vector<Byte>, Vector<Byte>) |
svuint8_t svqadd[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svqadd[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svqadd[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) UQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B UQADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B UQADD Zresult.B, Zop1.B, Zop2.B |
| AddSaturate(Vector<Byte>, Vector<SByte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<Int16>, Vector<Int16>) |
svint16_t svqadd[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svqadd[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svqadd[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) SQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H SQADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H SQADD Zresult.H, Zop1.H, Zop2.H |
| AddSaturate(Vector<Int16>, Vector<UInt16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<Int32>, Vector<Int32>) |
svint32_t svqadd[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svqadd[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svqadd[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) SQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S SQADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S SQADD Zresult.S, Zop1.S, Zop2.S |
| AddSaturate(Vector<Int32>, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<Int64>, Vector<Int64>) |
svint64_t svqadd[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svqadd[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svqadd[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) SQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D SQADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D SQADD Zresult.D, Zop1.D, Zop2.D |
| AddSaturate(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<SByte>, Vector<Byte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<SByte>, Vector<SByte>) |
svint8_t svqadd[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svqadd[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svqadd[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) SQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B SQADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B SQADD Zresult.B, Zop1.B, Zop2.B |
| AddSaturate(Vector<UInt16>, Vector<Int16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svqadd[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svqadd[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svqadd[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) UQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H UQADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H UQADD Zresult.H, Zop1.H, Zop2.H |
| AddSaturate(Vector<UInt32>, Vector<Int32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svqadd[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svqadd[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svqadd[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) UQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S UQADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S UQADD Zresult.S, Zop1.S, Zop2.S |
| AddSaturate(Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| AddSaturate(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svqadd[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svqadd[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svqadd[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) UQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D UQADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D UQADD Zresult.D, Zop1.D, Zop2.D |
| AddSaturateRotateComplex(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) SQCADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation |
| AddSaturateRotateComplex(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) SQCADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation |
| AddSaturateRotateComplex(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) SQCADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation |
| AddSaturateRotateComplex(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svqcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) SQCADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation |
| AddSaturateWithSignedAddend(Vector<Byte>, Vector<SByte>) |
svuint8_t svsqadd[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2) svuint8_t svsqadd[_u8]_x(svbool_t pg, svuint8_t op1, svint8_t op2) svuint8_t svsqadd[_u8]_z(svbool_t pg, svuint8_t op1, svint8_t op2) USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| AddSaturateWithSignedAddend(Vector<UInt16>, Vector<Int16>) |
svuint16_t svsqadd[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) svuint16_t svsqadd[_u16]_x(svbool_t pg, svuint16_t op1, svint16_t op2) svuint16_t svsqadd[_u16]_z(svbool_t pg, svuint16_t op1, svint16_t op2) USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| AddSaturateWithSignedAddend(Vector<UInt32>, Vector<Int32>) |
svuint32_t svsqadd[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) svuint32_t svsqadd[_u32]_x(svbool_t pg, svuint32_t op1, svint32_t op2) svuint32_t svsqadd[_u32]_z(svbool_t pg, svuint32_t op1, svint32_t op2) USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| AddSaturateWithSignedAddend(Vector<UInt64>, Vector<Int64>) |
svuint64_t svsqadd[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) svuint64_t svsqadd[_u64]_x(svbool_t pg, svuint64_t op1, svint64_t op2) svuint64_t svsqadd[_u64]_z(svbool_t pg, svuint64_t op1, svint64_t op2) USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| AddSaturateWithUnsignedAddend(Vector<Int16>, Vector<UInt16>) |
svint16_t svuqadd[_s16]_m(svbool_t pg, svint16_t op1, svuint16_t op2) svint16_t svuqadd[_s16]_x(svbool_t pg, svint16_t op1, svuint16_t op2) svint16_t svuqadd[_s16]_z(svbool_t pg, svint16_t op1, svuint16_t op2) SUQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H SUQADD Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| AddSaturateWithUnsignedAddend(Vector<Int32>, Vector<UInt32>) |
svint32_t svuqadd[_s32]_m(svbool_t pg, svint32_t op1, svuint32_t op2) svint32_t svuqadd[_s32]_x(svbool_t pg, svint32_t op1, svuint32_t op2) svint32_t svuqadd[_s32]_z(svbool_t pg, svint32_t op1, svuint32_t op2) SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| AddSaturateWithUnsignedAddend(Vector<Int64>, Vector<UInt64>) |
svint64_t svuqadd[_s64]_m(svbool_t pg, svint64_t op1, svuint64_t op2) svint64_t svuqadd[_s64]_x(svbool_t pg, svint64_t op1, svuint64_t op2) svint64_t svuqadd[_s64]_z(svbool_t pg, svint64_t op1, svuint64_t op2) SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| AddSaturateWithUnsignedAddend(Vector<SByte>, Vector<Byte>) |
svint8_t svuqadd[_s8]_m(svbool_t pg, svint8_t op1, svuint8_t op2) svint8_t svuqadd[_s8]_x(svbool_t pg, svint8_t op1, svuint8_t op2) svint8_t svuqadd[_s8]_z(svbool_t pg, svint8_t op1, svuint8_t op2) SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| AddWideningEven(Vector<Byte>, Vector<Byte>) |
svuint16_t svaddlb[_u16](svuint8_t op1, svuint8_t op2) UADDLB Zresult.H, Zop1.B, Zop2.B |
| AddWideningEven(Vector<Int16>, Vector<Int16>) |
svint32_t svaddlb[_s32](svint16_t op1, svint16_t op2) SADDLB Zresult.S, Zop1.H, Zop2.H |
| AddWideningEven(Vector<Int16>, Vector<SByte>) |
svint16_t svaddwb[_s16](svint16_t op1, svint8_t op2) SADDWB Zresult.H, Zop1.H, Zop2.B |
| AddWideningEven(Vector<Int32>, Vector<Int16>) |
svint32_t svaddwb[_s32](svint32_t op1, svint16_t op2) SADDWB Zresult.S, Zop1.S, Zop2.H |
| AddWideningEven(Vector<Int32>, Vector<Int32>) |
svint64_t svaddlb[_s64](svint32_t op1, svint32_t op2) SADDLB Zresult.D, Zop1.S, Zop2.S |
| AddWideningEven(Vector<Int64>, Vector<Int32>) |
svint64_t svaddwb[_s64](svint64_t op1, svint32_t op2) SADDWB Zresult.D, Zop1.D, Zop2.S |
| AddWideningEven(Vector<SByte>, Vector<SByte>) |
svint16_t svaddlb[_s16](svint8_t op1, svint8_t op2) SADDLB Zresult.H, Zop1.B, Zop2.B |
| AddWideningEven(Vector<UInt16>, Vector<Byte>) |
svuint16_t svaddwb[_u16](svuint16_t op1, svuint8_t op2) UADDWB Zresult.H, Zop1.H, Zop2.B |
| AddWideningEven(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svaddlb[_u32](svuint16_t op1, svuint16_t op2) UADDLB Zresult.S, Zop1.H, Zop2.H |
| AddWideningEven(Vector<UInt32>, Vector<UInt16>) |
svuint32_t svaddwb[_u32](svuint32_t op1, svuint16_t op2) UADDWB Zresult.S, Zop1.S, Zop2.H |
| AddWideningEven(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svaddlb[_u64](svuint32_t op1, svuint32_t op2) UADDLB Zresult.D, Zop1.S, Zop2.S |
| AddWideningEven(Vector<UInt64>, Vector<UInt32>) |
svuint64_t svaddwb[_u64](svuint64_t op1, svuint32_t op2) UADDWB Zresult.D, Zop1.D, Zop2.S |
| AddWideningEvenOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svaddlbt[_s32](svint16_t op1, svint16_t op2) SADDLBT Zresult.S, Zop1.H, Zop2.H |
| AddWideningEvenOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svaddlbt[_s64](svint32_t op1, svint32_t op2) SADDLBT Zresult.D, Zop1.S, Zop2.S |
| AddWideningEvenOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svaddlbt[_s16](svint8_t op1, svint8_t op2) SADDLBT Zresult.H, Zop1.B, Zop2.B |
| AddWideningOdd(Vector<Byte>, Vector<Byte>) |
svuint16_t svaddlt[_u16](svuint8_t op1, svuint8_t op2) UADDLT Zresult.H, Zop1.B, Zop2.B |
| AddWideningOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svaddlt[_s32](svint16_t op1, svint16_t op2) SADDLT Zresult.S, Zop1.H, Zop2.H |
| AddWideningOdd(Vector<Int16>, Vector<SByte>) |
svint16_t svaddwt[_s16](svint16_t op1, svint8_t op2) SADDWT Zresult.H, Zop1.H, Zop2.B |
| AddWideningOdd(Vector<Int32>, Vector<Int16>) |
svint32_t svaddwt[_s32](svint32_t op1, svint16_t op2) SADDWT Zresult.S, Zop1.S, Zop2.H |
| AddWideningOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svaddlt[_s64](svint32_t op1, svint32_t op2) SADDLT Zresult.D, Zop1.S, Zop2.S |
| AddWideningOdd(Vector<Int64>, Vector<Int32>) |
svint64_t svaddwt[_s64](svint64_t op1, svint32_t op2) SADDWT Zresult.D, Zop1.D, Zop2.S |
| AddWideningOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svaddlt[_s16](svint8_t op1, svint8_t op2) SADDLT Zresult.H, Zop1.B, Zop2.B |
| AddWideningOdd(Vector<UInt16>, Vector<Byte>) |
svuint16_t svaddwt[_u16](svuint16_t op1, svuint8_t op2) UADDWT Zresult.H, Zop1.H, Zop2.B |
| AddWideningOdd(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svaddlt[_u32](svuint16_t op1, svuint16_t op2) UADDLT Zresult.S, Zop1.H, Zop2.H |
| AddWideningOdd(Vector<UInt32>, Vector<UInt16>) |
svuint32_t svaddwt[_u32](svuint32_t op1, svuint16_t op2) UADDWT Zresult.S, Zop1.S, Zop2.H |
| AddWideningOdd(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svaddlt[_u64](svuint32_t op1, svuint32_t op2) UADDLT Zresult.D, Zop1.S, Zop2.S |
| AddWideningOdd(Vector<UInt64>, Vector<UInt32>) |
svuint64_t svaddwt[_u64](svuint64_t op1, svuint32_t op2) UADDWT Zresult.D, Zop1.D, Zop2.S |
| BitwiseClearXor(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svbcax[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svbcax[_s16](svint16_t op1, svint16_t op2, svint16_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svbcax[_s32](svint32_t op1, svint32_t op2, svint32_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svbcax[_s64](svint64_t op1, svint64_t op2, svint64_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svbcax[_s8](svint8_t op1, svint8_t op2, svint8_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svbcax[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svbcax[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseClearXor(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svbcax[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svbsl[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svbsl[_s16](svint16_t op1, svint16_t op2, svint16_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svbsl[_s32](svint32_t op1, svint32_t op2, svint32_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svbsl[_s64](svint64_t op1, svint64_t op2, svint64_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svbsl[_s8](svint8_t op1, svint8_t op2, svint8_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svbsl[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svbsl[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelect(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svbsl[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) BSL Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svbsl1n[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svbsl1n[_s16](svint16_t op1, svint16_t op2, svint16_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svbsl1n[_s32](svint32_t op1, svint32_t op2, svint32_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svbsl1n[_s64](svint64_t op1, svint64_t op2, svint64_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svbsl1n[_s8](svint8_t op1, svint8_t op2, svint8_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svbsl1n[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svbsl1n[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectLeftInverted(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svbsl1n[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) BSL1N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svbsl2n[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svbsl2n[_s16](svint16_t op1, svint16_t op2, svint16_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svbsl2n[_s32](svint32_t op1, svint32_t op2, svint32_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svbsl2n[_s64](svint64_t op1, svint64_t op2, svint64_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svbsl2n[_s8](svint8_t op1, svint8_t op2, svint8_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svbsl2n[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svbsl2n[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| BitwiseSelectRightInverted(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svbsl2n[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) BSL2N Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| ConvertToDoubleOdd(Vector<Single>) |
svfloat64_t svcvtlt_f64[_f32]_m(svfloat64_t inativo, svbool_t pg, svfloat32_t op) svfloat64_t svcvtlt_f64[_f32]_x(svbool_t pg, svfloat32_t op) FCVTLT Ztied.D, pg/M, Zop.S FCVTLT Ztied.D, pg/M, Ztied.S |
| ConvertToSingleEvenRoundToOdd(Vector<Double>) |
svfloat32_t svcvtx_f32[_f64]_m(svfloat32_t inativo, svbool_t pg, svfloat64_t op) svfloat32_t svcvtx_f32[_f64]_x(svbool_t pg, svfloat64_t op) svfloat32_t svcvtx_f32[_f64]_z(svbool_t pg, svfloat64_t op) FCVTX Ztied.S, pg/M, Zop.D FCVTX Ztied.S, pg/M, Ztied.D |
| ConvertToSingleOdd(Vector<Single>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ConvertToSingleOddRoundToOdd(Vector<Single>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElements(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElements(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElements(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElements(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElementsIn128BitSegments(Vector<Byte>, Vector<Byte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| CountMatchingElementsIn128BitSegments(Vector<SByte>, Vector<SByte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| DotProductRotateComplex(Vector<Int32>, Vector<SByte>, Vector<SByte>, Byte) |
svint32_t svcdot[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_rotation) CDOT Ztied1.S, Zop2.B, Zop3.B, #imm_rotation |
| DotProductRotateComplex(Vector<Int64>, Vector<Int16>, Vector<Int16>, Byte) |
svint64_t svcdot[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_rotation) CDOT Ztied1.D, Zop2.H, Zop3.H, #imm_rotation |
| DotProductRotateComplexBySelectedIndex(Vector<Int32>, Vector<SByte>, Vector<SByte>, Byte, Byte) |
svint32_t svcdot_lane[_s32](svint32_t op1, svint8_t op2, svint8_t op3, uint64_t imm_index, uint64_t imm_rotation) CDOT Ztied1.S, Zop2.B, Zop3.B[imm_index], #imm_rotation |
| DotProductRotateComplexBySelectedIndex(Vector<Int64>, Vector<Int16>, Vector<Int16>, Byte, Byte) |
svint64_t svcdot_lane[_s64](svint64_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index, uint64_t imm_rotation) CDOT Ztied1.D, Zop2.H, Zop3.H[imm_index], #imm_rotation |
| Equals(Object) |
Determina se o objeto especificado é igual ao objeto atual. (Herdado de Object) |
| FusedAddHalving(Vector<Byte>, Vector<Byte>) |
svuint8_t svhadd[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svhadd[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svhadd[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B UHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B |
| FusedAddHalving(Vector<Int16>, Vector<Int16>) |
svint16_t svhadd[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svhadd[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svhadd[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H SHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H |
| FusedAddHalving(Vector<Int32>, Vector<Int32>) |
svint32_t svhadd[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svhadd[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svhadd[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) SHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S SHADD Ztied1.S, pg/M, Ztied1.S, Zop2.S SHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S |
| FusedAddHalving(Vector<Int64>, Vector<Int64>) |
svint64_t svhadd[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svhadd[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svhadd[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D SHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D |
| FusedAddHalving(Vector<SByte>, Vector<SByte>) |
svint8_t svhadd[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svhadd[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svhadd[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B SHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B |
| FusedAddHalving(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svhadd[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svhadd[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svhadd[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) UHADD Ztied1.H, pg/M, Ztied1.H, Zop2.H UHADD Ztied1.H, pg/M, Ztied1.H, Ztied1.H, Zop2.H UHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H |
| FusedAddHalving(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svhadd[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svhadd[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svhadd[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S UHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S |
| FusedAddHalving(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svhadd[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svhadd[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svhadd[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D UHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D |
| FusedAddRoundedHalving(Vector<Byte>, Vector<Byte>) |
svuint8_t svrhadd[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) URHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| FusedAddRoundedHalving(Vector<Int16>, Vector<Int16>) |
svint16_t svrhadd[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) SRHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| FusedAddRoundedHalving(Vector<Int32>, Vector<Int32>) |
svint32_t svrhadd[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) SRHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| FusedAddRoundedHalving(Vector<Int64>, Vector<Int64>) |
svint64_t svrhadd[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) SRHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| FusedAddRoundedHalving(Vector<SByte>, Vector<SByte>) |
svint8_t svrhadd[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) SRHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| FusedAddRoundedHalving(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svrhadd[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) URHADD Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| FusedAddRoundedHalving(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svrhadd[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) URHADD Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| FusedAddRoundedHalving(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svrhadd[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) URHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| FusedSubtractHalving(Vector<Byte>, Vector<Byte>) |
svuint8_t svhsub[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svhsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svhsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B UHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B |
| FusedSubtractHalving(Vector<Int16>, Vector<Int16>) |
svint16_t svhsub[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svhsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svhsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) SHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H SHSUB Ztied1.H, Pg/M, Ztied1.H, Ztied1.H, Zop2.H SHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H |
| FusedSubtractHalving(Vector<Int32>, Vector<Int32>) |
svint32_t svhsub[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svhsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svhsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S SHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S |
| FusedSubtractHalving(Vector<Int64>, Vector<Int64>) |
svint64_t svhsub[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svhsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svhsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D SHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D |
| FusedSubtractHalving(Vector<SByte>, Vector<SByte>) |
svint8_t svhsub[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svhsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svhsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) SHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B SHSUB Ztied1.B, Pg/M, Ztied1.B, Ztied1.B, Zop2.B SHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B |
| FusedSubtractHalving(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svhsub[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svhsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svhsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) UHSUB Ztied1.H, pg/M, Ztied1.H, Zop2.H UHSUB Ztied1.H, pg/M, Ztied1.H, Zop2.H UHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H |
| FusedSubtractHalving(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svhsub[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svhsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svhsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S UHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S |
| FusedSubtractHalving(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svhsub[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svhsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svhsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D UHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D |
| GatherVectorByteZeroExtendNonTemporal(Vector<Int32>, Byte*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<Int64>, Byte*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<Int64>, Byte*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<UInt32>, Byte*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<UInt64>, Byte*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<UInt64>, Byte*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorByteZeroExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<Int64>, Int16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<Int64>, Int16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<UInt64>, Int16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<UInt64>, Int16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16SignExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<Int32>, Int16*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<Int64>, Int16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<Int64>, Int16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<UInt32>, Int16*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<UInt64>, Int16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt16WithByteOffsetsSignExtendNonTemporal(Vector<UInt64>, Int16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<Int64>, Int32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<Int64>, Int32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<UInt64>, Int32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<UInt64>, Int32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32SignExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32WithByteOffsetsSignExtendNonTemporal(Vector<Int64>, Int32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32WithByteOffsetsSignExtendNonTemporal(Vector<Int64>, Int32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32WithByteOffsetsSignExtendNonTemporal(Vector<UInt64>, Int32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorInt32WithByteOffsetsSignExtendNonTemporal(Vector<UInt64>, Int32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Double>, Double*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Double>, Double*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Double>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Int64>, Int64*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Int64>, Int64*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<UInt64>, UInt64*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<UInt64>, UInt64*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<Int32>, SByte*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<Int64>, SByte*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<Int64>, SByte*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<UInt32>, SByte*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<UInt64>, SByte*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<UInt64>, SByte*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorSByteSignExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<Int32>, UInt16*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<Int64>, UInt16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<Int64>, UInt16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<UInt32>, UInt16*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<UInt64>, UInt16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16WithByteOffsetsZeroExtendNonTemporal(Vector<UInt64>, UInt16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<Int64>, UInt16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<Int64>, UInt16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<UInt64>, UInt16*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<UInt64>, UInt16*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt16ZeroExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32WithByteOffsetsZeroExtendNonTemporal(Vector<Int64>, UInt32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32WithByteOffsetsZeroExtendNonTemporal(Vector<Int64>, UInt32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32WithByteOffsetsZeroExtendNonTemporal(Vector<UInt64>, UInt32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32WithByteOffsetsZeroExtendNonTemporal(Vector<UInt64>, UInt32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<Int64>, UInt32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<Int64>, UInt32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<UInt64>, UInt32*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<UInt64>, UInt32*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorUInt32ZeroExtendNonTemporal(Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Double>, Double*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Double>, Double*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Int32>, Int32*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Int64>, Int64*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Int64>, Int64*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<Single>, Single*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<UInt32>, UInt32*, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<UInt64>, UInt64*, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GatherVectorWithByteOffsetsNonTemporal(Vector<UInt64>, UInt64*, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| GetHashCode() |
Serve como função de hash predefinida. (Herdado de Object) |
| GetType() |
Obtém o Type da instância atual. (Herdado de Object) |
| InterleavingXorEvenOdd(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svint8_t sveorbt[_s8](svint8_t odd, svint8_t op1, svint8_t op2) EORBT Zd.B, Zn.B, Zm.B |
| InterleavingXorEvenOdd(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t sveorbt[_s16](svint16_t odd, svint16_t op1, svint16_t op2) EORBT Zd.H, Zn.H, Zm.H |
| InterleavingXorEvenOdd(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t sveorbt[_s32](svint32_t impar, svint32_t op1, svint32_t op2) EORBT Zd.S, Zn.S, Zm.S |
| InterleavingXorEvenOdd(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t sveorbt[_s64](svint64_t odd, svint64_t op1, svint64_t op2) EORBT Zd.D, Zn.D, Zm.D |
| InterleavingXorEvenOdd(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t sveorbt[_s8](svint8_t odd, svint8_t op1, svint8_t op2) EORBT Zd.B, Zn.B, Zm.B |
| InterleavingXorEvenOdd(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svint16_t sveorbt[_s16](svint16_t odd, svint16_t op1, svint16_t op2) EORBT Zd.H, Zn.H, Zm.H |
| InterleavingXorEvenOdd(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svint32_t sveorbt[_s32](svint32_t impar, svint32_t op1, svint32_t op2) EORBT Zd.S, Zn.S, Zm.S |
| InterleavingXorEvenOdd(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svint64_t sveorbt[_s64](svint64_t odd, svint64_t op1, svint64_t op2) EORBT Zd.D, Zn.D, Zm.D |
| InterleavingXorOddEven(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svint8_t sveortb[_s8](svint8_t par, svint8_t op1, svint8_t op2) EORTB Zd.B, Zn.B, Zm.B |
| InterleavingXorOddEven(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t sveortb[_s16](svint16_t par, svint16_t op1, svint16_t op2) EORTB Zd.H, Zn.H, Zm.H |
| InterleavingXorOddEven(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t sveortb[_s32](svint32_t par, svint32_t op1, svint32_t op2) EORTB Zd.S, Zn.S, Zm.S |
| InterleavingXorOddEven(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t sveortb[_s64](svint64_t even, svint64_t op1, svint64_t op2) EORTB Zd.D, Zn.D, Zm.D |
| InterleavingXorOddEven(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t sveortb[_s8](svint8_t par, svint8_t op1, svint8_t op2) EORTB Zd.B, Zn.B, Zm.B |
| InterleavingXorOddEven(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svint16_t sveortb[_s16](svint16_t par, svint16_t op1, svint16_t op2) EORTB Zd.H, Zn.H, Zm.H |
| InterleavingXorOddEven(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svint32_t sveortb[_s32](svint32_t par, svint32_t op1, svint32_t op2) EORTB Zd.S, Zn.S, Zm.S |
| InterleavingXorOddEven(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svint64_t sveortb[_s64](svint64_t even, svint64_t op1, svint64_t op2) EORTB Zd.D, Zn.D, Zm.D |
| Log2(Vector<Double>) |
svint64_t svlogb[_f64]_m(svint64_t inativo, svbool_t pg, svfloat64_t op) svint64_t svlogb[_f64]_x(svbool_t pg, svfloat64_t op) svint64_t svlogb[_f64]_z(svbool_t pg, svfloat64_t op) FLOGB Ztied.D, Pg/M, Zop.D FLOGB Ztied.D, Pg/M, Ztied.D |
| Log2(Vector<Single>) |
svint32_t svlogb[_f32]_m(svint32_t inativo, svbool_t pg, svfloat32_t op) svint32_t svlogb[_f32]_x(svbool_t pg, svfloat32_t op) svint32_t svlogb[_f32]_z(svbool_t pg, svfloat32_t op) FLOGB Ztied.S, pg/M, Zop.S FLOGB Ztied.S, pg/M, Ztied.S |
| Match(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Match(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Match(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Match(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| MaxNumberPairwise(Vector<Double>, Vector<Double>) |
svfloat64_t svmaxnmp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) svfloat64_t svmaxnmp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) FMAXNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MaxNumberPairwise(Vector<Single>, Vector<Single>) |
svfloat32_t svmaxnmp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) svfloat32_t svmaxnmp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) FMAXNMP Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| MaxPairwise(Vector<Byte>, Vector<Byte>) |
svuint8_t svmaxp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svmaxp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) UMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| MaxPairwise(Vector<Double>, Vector<Double>) |
svfloat64_t svmaxp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) svfloat64_t svmaxp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) FMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MaxPairwise(Vector<Int16>, Vector<Int16>) |
svint16_t svmaxp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svmaxp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) SMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| MaxPairwise(Vector<Int32>, Vector<Int32>) |
svint32_t svmaxp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svmaxp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) SMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| MaxPairwise(Vector<Int64>, Vector<Int64>) |
svint64_t svmaxp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svmaxp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) SMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MaxPairwise(Vector<SByte>, Vector<SByte>) |
svint8_t svmaxp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svmaxp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) SMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| MaxPairwise(Vector<Single>, Vector<Single>) |
svfloat32_t svmaxp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) svfloat32_t svmaxp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) FMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| MaxPairwise(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svmaxp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svmaxp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) UMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H |
| MaxPairwise(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svmaxp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svmaxp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) UMAXP Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| MaxPairwise(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svmaxp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svmaxp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) UMAXP Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| MemberwiseClone() |
Cria uma cópia superficial do atual Object. (Herdado de Object) |
| MinNumberPairwise(Vector<Double>, Vector<Double>) |
svfloat64_t svminnmp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) svfloat64_t svminnmp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) FMINNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MinNumberPairwise(Vector<Single>, Vector<Single>) |
svfloat32_t svminnmp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) svfloat32_t svminnmp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) FMINNMP Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| MinPairwise(Vector<Byte>, Vector<Byte>) |
svuint8_t svminp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svminp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) UMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| MinPairwise(Vector<Double>, Vector<Double>) |
svfloat64_t svminp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) svfloat64_t svminp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) FMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MinPairwise(Vector<Int16>, Vector<Int16>) |
svint16_t svminp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svminp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) SMINP Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| MinPairwise(Vector<Int32>, Vector<Int32>) |
svint32_t svminp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svminp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) SMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| MinPairwise(Vector<Int64>, Vector<Int64>) |
svint64_t svminp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svminp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) SMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| MinPairwise(Vector<SByte>, Vector<SByte>) |
svint8_t svminp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svminp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) SMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| MinPairwise(Vector<Single>, Vector<Single>) |
svfloat32_t svminp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) svfloat32_t svminp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) FMINP Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| MinPairwise(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svminp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svminp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) UMINP Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| MinPairwise(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svminp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svminp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) UMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S |
| MinPairwise(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svminp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svminp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) UMINP Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| MultiplyAddBySelectedScalar(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svmla_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) MLA Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplyAddBySelectedScalar(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svmla_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) MLA Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplyAddBySelectedScalar(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svmla_lane[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_index) MLA Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplyAddBySelectedScalar(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svmla_lane[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) MLA Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplyAddBySelectedScalar(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svmla_lane[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) MLA Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplyAddBySelectedScalar(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svmla_lane[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3, uint64_t imm_index) MLA Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplyAddRotateComplex(Vector<Byte>, Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svcmla[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3, uint64_t imm_rotation) CMLA Ztied1.B, Zop2.B, Zop3.B, #imm_rotation |
| MultiplyAddRotateComplex(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svcmla[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_rotation) CMLA Ztied1.H, Zop2.H, Zop3.H, #imm_rotation |
| MultiplyAddRotateComplex(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svcmla[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_rotation) CMLA Ztied1.S, Zop2.S, Zop3.S, #imm_rotation |
| MultiplyAddRotateComplex(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svcmla[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_rotation) CMLA Ztied1.D, Zop2.D, Zop3.D, #imm_rotation |
| MultiplyAddRotateComplex(Vector<SByte>, Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svcmla[_s8](svint8_t op1, svint8_t op2, svint8_t op3, uint64_t imm_rotation) CMLA Ztied1.B, Zop2.B, Zop3.B, #imm_rotation |
| MultiplyAddRotateComplex(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svcmla[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_rotation) CMLA Ztied1.H, Zop2.H, Zop3.H, #imm_rotation |
| MultiplyAddRotateComplex(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svcmla[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_rotation) CMLA Ztied1.S, Zop2.S, Zop3.S, #imm_rotation |
| MultiplyAddRotateComplex(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svcmla[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3, uint64_t imm_rotation) CMLA Ztied1.D, Zop2.D, Zop3.D, #imm_rotation |
| MultiplyAddRotateComplexBySelectedScalar(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte, Byte) |
svint16_t svcmla_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index, uint64_t imm_rotation) CMLA Ztied1.H, Zop2.H, Zop3.H[imm_index], #imm_rotation |
| MultiplyAddRotateComplexBySelectedScalar(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte, Byte) |
svint32_t svcmla_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index, uint64_t imm_rotation) CMLA Ztied1.S, Zop2.S, Zop3.S[imm_index], #imm_rotation |
| MultiplyAddRotateComplexBySelectedScalar(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>, Byte, Byte) |
svuint16_t svcmla_lane[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index, uint64_t imm_rotation) CMLA Ztied1.H, Zop2.H, Zop3.H[imm_index], #imm_rotation |
| MultiplyAddRotateComplexBySelectedScalar(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>, Byte, Byte) |
svuint32_t svcmla_lane[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index, uint64_t imm_rotation) CMLA Ztied1.S, Zop2.S, Zop3.S[imm_index], #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplex(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqrdcmlah[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_rotation) SQRDCMLAH Ztied1.H, Zop2.H, Zop3.H, #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplex(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqrdcmlah[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_rotation) SQRDCMLAH Ztied1.S, Zop2.S, Zop3.S, #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplex(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqrdcmlah[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_rotation) SQRDCMLAH Ztied1.D, Zop2.D, Zop3.D, #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplex(Vector<SByte>, Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svqrdcmlah[_s8](svint8_t op1, svint8_t op2, svint8_t op3, uint64_t imm_rotation) SQRDCMLAH Ztied1.B, Zop2.B, Zop3.B, #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplexBySelectedScalar(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte, Byte) |
svint16_t svqrdcmlah_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index, uint64_t imm_rotation) SQRDCMLAH Ztied1.H, Zop2.H, Zop3.H[imm_index], #imm_rotation |
| MultiplyAddRoundedDoublingSaturateHighRotateComplexBySelectedScalar(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte, Byte) |
svint32_t svqrdcmlah_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index, uint64_t imm_rotation) SQRDCMLAH Ztied1.S, Zop2.S, Zop3.S[imm_index], #imm_rotation |
| MultiplyBySelectedScalar(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svmul_lane[_s16](svint16_t op1, svint16_t op2, uint64_t imm_index) MUL Zresult.H, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalar(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svmul_lane[_s32](svint32_t op1, svint32_t op2, uint64_t imm_index) MUL Zresult.S, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalar(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svmul_lane[_s64](svint64_t op1, svint64_t op2, uint64_t imm_index) MUL Zresult.D, Zop1.D, Zop2.D[imm_index] |
| MultiplyBySelectedScalar(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svmul_lane[_u16](svuint16_t op1, svuint16_t op2, uint64_t imm_index) MUL Zresult.H, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalar(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svmul_lane[_u32](svuint32_t op1, svuint32_t op2, uint64_t imm_index) MUL Zresult.S, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalar(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svmul_lane[_u64](svuint64_t op1, svuint64_t op2, uint64_t imm_index) MUL Zresult.D, Zop1.D, Zop2.D[imm_index] |
| MultiplyBySelectedScalarWideningEven(Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmullb_lane[_s32](svint16_t op1, svint16_t op2, uint64_t imm_index) SMULLB Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalarWideningEven(Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmullb_lane[_s64](svint32_t op1, svint32_t op2, uint64_t imm_index) SMULLB Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalarWideningEven(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmullb_lane[_u32](svuint16_t op1, svuint16_t op2, uint64_t imm_index) UMULLB Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalarWideningEven(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmullb_lane[_u64](svuint32_t op1, svuint32_t op2, uint64_t imm_index) UMULLB Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndAdd(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmlalb_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SMLALB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndAdd(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmlalb_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SMLALB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndAdd(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmlalb_lane[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) UMLALB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndAdd(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmlalb_lane[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) UMLALB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndSubtract(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmlslb_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SMLSLB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndSubtract(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmlslb_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SMLSLB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndSubtract(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmlslb_lane[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) UMLSLB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningEvenAndSubtract(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmlslb_lane[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) UMLSLB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningOdd(Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmullt_lane[_s32](svint16_t op1, svint16_t op2, uint64_t imm_index) SMULLT Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalarWideningOdd(Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmullt_lane[_s64](svint32_t op1, svint32_t op2, uint64_t imm_index) SMULLT Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalarWideningOdd(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmullt_lane[_u32](svuint16_t op1, svuint16_t op2, uint64_t imm_index) UMULLT Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyBySelectedScalarWideningOdd(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmullt_lane[_u64](svuint32_t op1, svuint32_t op2, uint64_t imm_index) UMULLT Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyBySelectedScalarWideningOddAndAdd(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmlalt_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SMLALT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningOddAndAdd(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmlalt_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SMLALT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningOddAndAdd(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmlalt_lane[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) UMLALT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningOddAndAdd(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmlalt_lane[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) UMLALT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningOddAndSubtract(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svmlslt_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SMLSLT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningOddAndSubtract(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svmlslt_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SMLSLT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyBySelectedScalarWideningOddAndSubtract(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint32_t svmlslt_lane[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) UMLSLT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyBySelectedScalarWideningOddAndSubtract(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint64_t svmlslt_lane[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) UMLSLT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyDoublingBySelectedScalarSaturateHigh(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqdmulh_lane[_s16](svint16_t op1, svint16_t op2, uint64_t imm_index) SQDMULH Zresult.H, Zop1.H, Zop2.H[imm_index] |
| MultiplyDoublingBySelectedScalarSaturateHigh(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqdmulh_lane[_s32](svint32_t op1, svint32_t op2, uint64_t imm_index) SQDMULH Zresult.S, Zop1.S, Zop2.S[imm_index] |
| MultiplyDoublingBySelectedScalarSaturateHigh(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqdmulh_lane[_s64](svint64_t op1, svint64_t op2, uint64_t imm_index) SQDMULH Zresult.D, Zop1.D, Zop2.D[imm_index] |
| MultiplyDoublingSaturateHigh(Vector<Int16>, Vector<Int16>) |
svint16_t svqdmulh[_s16](svint16_t op1, svint16_t op2) SQDMULH Zresult.H, Zop1.H, Zop2.H |
| MultiplyDoublingSaturateHigh(Vector<Int32>, Vector<Int32>) |
svint32_t svqdmulh[_s32](svint32_t op1, svint32_t op2) SQDMULH Zresult.S, Zop1.S, Zop2.S |
| MultiplyDoublingSaturateHigh(Vector<Int64>, Vector<Int64>) |
svint64_t svqdmulh[_s64](svint64_t op1, svint64_t op2) SQDMULH Zresult.D, Zop1.D, Zop2.D |
| MultiplyDoublingSaturateHigh(Vector<SByte>, Vector<SByte>) |
svint8_t svqdmulh[_s8](svint8_t op1, svint8_t op2) SQDMULH Zresult.B, Zop1.B, Zop2.B |
| MultiplyDoublingWideningAndAddSaturateEven(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlalb[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLALB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndAddSaturateEven(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlalb[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLALB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndAddSaturateEven(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlalb[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLALB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningAndAddSaturateEvenOdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlalbt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLALBT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndAddSaturateEvenOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlalbt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLALBT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndAddSaturateEvenOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlalbt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLALBT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningAndAddSaturateOdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlalt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLALT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndAddSaturateOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlalt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLALT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndAddSaturateOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlalt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLALT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningAndSubtractSaturateEven(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlslb[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLSLB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndSubtractSaturateEven(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlslb[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLSLB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndSubtractSaturateEven(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlslb[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLSLB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningAndSubtractSaturateEvenOdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlslbt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLSLBT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndSubtractSaturateEvenOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlslbt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLSLBT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndSubtractSaturateEvenOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlslbt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLSLBT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningAndSubtractSaturateOdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svqdmlslt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SQDMLSLT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyDoublingWideningAndSubtractSaturateOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svqdmlslt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SQDMLSLT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyDoublingWideningAndSubtractSaturateOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svqdmlslt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SQDMLSLT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyDoublingWideningBySelectedScalarAndAddSaturateEven(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmlalb_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQDMLALB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndAddSaturateEven(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmlalb_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQDMLALB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndAddSaturateOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmlalt_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQDMLALT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndAddSaturateOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmlalt_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQDMLALT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateEven(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmlslb_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQDMLSLB Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateEven(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmlslb_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQDMLSLB Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateOdd(Vector<Int32>, Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmlslt_lane[_s32](svint32_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQDMLSLT Ztied1.S, Zop2.H, Zop3.H[imm_index] |
| MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateOdd(Vector<Int64>, Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmlslt_lane[_s64](svint64_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQDMLSLT Ztied1.D, Zop2.S, Zop3.S[imm_index] |
| MultiplyDoublingWideningSaturateEven(Vector<Int16>, Vector<Int16>) |
svint32_t svqdmullb[_s32](svint16_t op1, svint16_t op2) SQDMULLB Zresult.S, Zop1.H, Zop2.H |
| MultiplyDoublingWideningSaturateEven(Vector<Int32>, Vector<Int32>) |
svint64_t svqdmullb[_s64](svint32_t op1, svint32_t op2) SQDMULLB Zresult.D, Zop1.S, Zop2.S |
| MultiplyDoublingWideningSaturateEven(Vector<SByte>, Vector<SByte>) |
svint16_t svqdmullb[_s16](svint8_t op1, svint8_t op2) SQDMULLB Zresult.H, Zop1.B, Zop2.B |
| MultiplyDoublingWideningSaturateEvenBySelectedScalar(Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmullb_lane[_s32](svint16_t op1, svint16_t op2, uint64_t imm_index) SQDMULLB Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyDoublingWideningSaturateEvenBySelectedScalar(Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmullb_lane[_s64](svint32_t op1, svint32_t op2, uint64_t imm_index) SQDMULLB Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyDoublingWideningSaturateOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svqdmullt[_s32](svint16_t op1, svint16_t op2) SQDMULLT Zresult.S, Zop1.H, Zop2.H |
| MultiplyDoublingWideningSaturateOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svqdmullt[_s64](svint32_t op1, svint32_t op2) SQDMULLT Zresult.D, Zop1.S, Zop2.S |
| MultiplyDoublingWideningSaturateOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svqdmullt[_s16](svint8_t op1, svint8_t op2) SQDMULLT Zresult.H, Zop1.B, Zop2.B |
| MultiplyDoublingWideningSaturateOddBySelectedScalar(Vector<Int16>, Vector<Int16>, Byte) |
svint32_t svqdmullt_lane[_s32](svint16_t op1, svint16_t op2, uint64_t imm_index) SQDMULLT Zresult.S, Zop1.H, Zop2.H[imm_index] |
| MultiplyDoublingWideningSaturateOddBySelectedScalar(Vector<Int32>, Vector<Int32>, Byte) |
svint64_t svqdmullt_lane[_s64](svint32_t op1, svint32_t op2, uint64_t imm_index) SQDMULLT Zresult.D, Zop1.S, Zop2.S[imm_index] |
| MultiplyRoundedDoublingBySelectedScalarSaturateHigh(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqrdmulh_lane[_s16](svint16_t op1, svint16_t op2, uint64_t imm_index) SQRDMULH Zresult.H, Zop1.H, Zop2.H[imm_index] |
| MultiplyRoundedDoublingBySelectedScalarSaturateHigh(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqrdmulh_lane[_s32](svint32_t op1, svint32_t op2, uint64_t imm_index) SQRDMULH Zresult.S, Zop1.S, Zop2.S[imm_index] |
| MultiplyRoundedDoublingBySelectedScalarSaturateHigh(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqrdmulh_lane[_s64](svint64_t op1, svint64_t op2, uint64_t imm_index) SQRDMULH Zresult.D, Zop1.D, Zop2.D[imm_index] |
| MultiplyRoundedDoublingSaturateAndAddHigh(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svqrdmlah[_s16](svint16_t op1, svint16_t op2, svint16_t op3) SQRDMLAH Ztied1.H, Zop2.H, Zop3.H |
| MultiplyRoundedDoublingSaturateAndAddHigh(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svqrdmlah[_s32](svint32_t op1, svint32_t op2, svint32_t op3) SQRDMLAH Ztied1.S, Zop2.S, Zop3.S |
| MultiplyRoundedDoublingSaturateAndAddHigh(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svqrdmlah[_s64](svint64_t op1, svint64_t op2, svint64_t op3) SQRDMLAH Ztied1.D, Zop2.D, Zop3.D |
| MultiplyRoundedDoublingSaturateAndAddHigh(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svqrdmlah[_s8](svint8_t op1, svint8_t op2, svint8_t op3) SQRDMLAH Ztied1.B, Zop2.B, Zop3.B |
| MultiplyRoundedDoublingSaturateAndSubtractHigh(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t svqrdmlsh[_s16](svint16_t op1, svint16_t op2, svint16_t op3) SQRDMLSH Ztied1.H, Zop2.H, Zop3.H |
| MultiplyRoundedDoublingSaturateAndSubtractHigh(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t svqrdmlsh[_s32](svint32_t op1, svint32_t op2, svint32_t op3) SQRDMLSH Ztied1.S, Zop2.S, Zop3.S |
| MultiplyRoundedDoublingSaturateAndSubtractHigh(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t svqrdmlsh[_s64](svint64_t op1, svint64_t op2, svint64_t op3) SQRDMLSH Ztied1.D, Zop2.D, Zop3.D |
| MultiplyRoundedDoublingSaturateAndSubtractHigh(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t svqrdmlsh[_s8](svint8_t op1, svint8_t op2, svint8_t op3) SQRDMLSH Ztied1.B, Zop2.B, Zop3.B |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndAddHigh(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqrdmlah_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQRDMLAH Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndAddHigh(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqrdmlah_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQRDMLAH Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndAddHigh(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqrdmlah_lane[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_index) SQRDMLAH Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndSubtractHigh(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svqrdmlsh_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) SQRDMLSH Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndSubtractHigh(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svqrdmlsh_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) SQRDMLSH Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplyRoundedDoublingSaturateBySelectedScalarAndSubtractHigh(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svqrdmlsh_lane[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_index) SQRDMLSH Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplyRoundedDoublingSaturateHigh(Vector<Int16>, Vector<Int16>) |
svint16_t svqrdmulh[_s16](svint16_t op1, svint16_t op2) SQRDMULH Zresult.H, Zop1.H, Zop2.H |
| MultiplyRoundedDoublingSaturateHigh(Vector<Int32>, Vector<Int32>) |
svint32_t svqrdmulh[_s32](svint32_t op1, svint32_t op2) SQRDMULH Zresult.S, Zop1.S, Zop2.S |
| MultiplyRoundedDoublingSaturateHigh(Vector<Int64>, Vector<Int64>) |
svint64_t svqrdmulh[_s64](svint64_t op1, svint64_t op2) SQRDMULH Zresult.D, Zop1.D, Zop2.D |
| MultiplyRoundedDoublingSaturateHigh(Vector<SByte>, Vector<SByte>) |
svint8_t svqrdmulh[_s8](svint8_t op1, svint8_t op2) SQRDMULH Zresult.B, Zop1.B, Zop2.B |
| MultiplySubtractBySelectedScalar(Vector<Int16>, Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svmls_lane[_s16](svint16_t op1, svint16_t op2, svint16_t op3, uint64_t imm_index) MLS Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplySubtractBySelectedScalar(Vector<Int32>, Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svmls_lane[_s32](svint32_t op1, svint32_t op2, svint32_t op3, uint64_t imm_index) MLS Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplySubtractBySelectedScalar(Vector<Int64>, Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svmls_lane[_s64](svint64_t op1, svint64_t op2, svint64_t op3, uint64_t imm_index) MLS Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplySubtractBySelectedScalar(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svmls_lane[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3, uint64_t imm_index) MLS Ztied1.H, Zop2.H, Zop3.H[imm_index] |
| MultiplySubtractBySelectedScalar(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svmls_lane[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3, uint64_t imm_index) MLS Ztied1.S, Zop2.S, Zop3.S[imm_index] |
| MultiplySubtractBySelectedScalar(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svmls_lane[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3, uint64_t imm_index) MLS Ztied1.D, Zop2.D, Zop3.D[imm_index] |
| MultiplyWideningEven(Vector<Byte>, Vector<Byte>) |
svuint16_t svmullb[_u16](svuint8_t op1, svuint8_t op2) UMULLB Zresult.H, Zop1.B, Zop2.B |
| MultiplyWideningEven(Vector<Int16>, Vector<Int16>) |
svint32_t svmullb[_s32](svint16_t op1, svint16_t op2) SMULLB Zresult.S, Zop1.H, Zop2.H |
| MultiplyWideningEven(Vector<Int32>, Vector<Int32>) |
svint64_t svmullb[_s64](svint32_t op1, svint32_t op2) SMULLB Zresult.D, Zop1.S, Zop2.S |
| MultiplyWideningEven(Vector<SByte>, Vector<SByte>) |
svint16_t svmullb[_s16](svint8_t op1, svint8_t op2) SMULLB Zresult.H, Zop1.B, Zop2.B |
| MultiplyWideningEven(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmullb[_u32](svuint16_t op1, svuint16_t op2) UMULLB Zresult.S, Zop1.H, Zop2.H |
| MultiplyWideningEven(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmullb[_u64](svuint32_t op1, svuint32_t op2) UMULLB Zresult.D, Zop1.S, Zop2.S |
| MultiplyWideningEvenAndAdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svmlalb[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SMLALB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningEvenAndAdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svmlalb[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SMLALB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningEvenAndAdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svmlalb[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SMLALB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningEvenAndAdd(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svmlalb[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UMLALB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningEvenAndAdd(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmlalb[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UMLALB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningEvenAndAdd(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmlalb[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UMLALB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningEvenAndSubtract(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svmlslb[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SMLSLB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningEvenAndSubtract(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svmlslb[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SMLSLB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningEvenAndSubtract(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svmlslb[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SMLSLB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningEvenAndSubtract(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svmlslb[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UMLSLB Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningEvenAndSubtract(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmlslb[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UMLSLB Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningEvenAndSubtract(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmlslb[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UMLSLB Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningOdd(Vector<Byte>, Vector<Byte>) |
svuint16_t svmullt[_u16](svuint8_t op1, svuint8_t op2) UMULLT Zresult.H, Zop1.B, Zop2.B |
| MultiplyWideningOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svmullt[_s32](svint16_t op1, svint16_t op2) SMULLT Zresult.S, Zop1.H, Zop2.H |
| MultiplyWideningOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svmullt[_s64](svint32_t op1, svint32_t op2) SMULLT Zresult.D, Zop1.S, Zop2.S |
| MultiplyWideningOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svmullt[_s16](svint8_t op1, svint8_t op2) SMULLT Zresult.H, Zop1.B, Zop2.B |
| MultiplyWideningOdd(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmullt[_u32](svuint16_t op1, svuint16_t op2) UMULLT Zresult.S, Zop1.H, Zop2.H |
| MultiplyWideningOdd(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmullt[_u64](svuint32_t op1, svuint32_t op2) UMULLT Zresult.D, Zop1.S, Zop2.S |
| MultiplyWideningOddAndAdd(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svmlalt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SMLALT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningOddAndAdd(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svmlalt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SMLALT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningOddAndAdd(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svmlalt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SMLALT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningOddAndAdd(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svmlalt[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UMLALT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningOddAndAdd(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmlalt[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UMLALT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningOddAndAdd(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmlalt[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UMLALT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningOddAndSubtract(Vector<Int16>, Vector<SByte>, Vector<SByte>) |
svint16_t svmlslt[_s16](svint16_t op1, svint8_t op2, svint8_t op3) SMLSLT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningOddAndSubtract(Vector<Int32>, Vector<Int16>, Vector<Int16>) |
svint32_t svmlslt[_s32](svint32_t op1, svint16_t op2, svint16_t op3) SMLSLT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningOddAndSubtract(Vector<Int64>, Vector<Int32>, Vector<Int32>) |
svint64_t svmlslt[_s64](svint64_t op1, svint32_t op2, svint32_t op3) SMLSLT Ztied1.D, Zop2.S, Zop3.S |
| MultiplyWideningOddAndSubtract(Vector<UInt16>, Vector<Byte>, Vector<Byte>) |
svuint16_t svmlslt[_u16](svuint16_t op1, svuint8_t op2, svuint8_t op3) UMLSLT Ztied1.H, Zop2.B, Zop3.B |
| MultiplyWideningOddAndSubtract(Vector<UInt32>, Vector<UInt16>, Vector<UInt16>) |
svuint32_t svmlslt[_u32](svuint32_t op1, svuint16_t op2, svuint16_t op3) UMLSLT Ztied1.S, Zop2.H, Zop3.H |
| MultiplyWideningOddAndSubtract(Vector<UInt64>, Vector<UInt32>, Vector<UInt32>) |
svuint64_t svmlslt[_u64](svuint64_t op1, svuint32_t op2, svuint32_t op3) UMLSLT Ztied1.D, Zop2.S, Zop3.S |
| NegateSaturate(Vector<Int16>) |
svint16_t svqneg[_s16]_m(svint16_t inativo, svbool_t pg, svint16_t op) svint16_t svqneg[_s16]_x(svbool_t pg, svint16_t op) svint16_t svqneg[_s16]_z(svbool_t pg, svint16_t op) SQNEG Ztied.H, Pg/M, Zop.H SQNEG Ztied.H, Pg/M, Ztied.H |
| NegateSaturate(Vector<Int32>) |
svint32_t svqneg[_s32]_m(svint32_t inativo, svbool_t pg, svint32_t op) svint32_t svqneg[_s32]_x(svbool_t pg, svint32_t op) svint32_t svqneg[_s32]_z(svbool_t pg, svint32_t op) SQNEG Ztied.S, Pg/M, Zop.S SQNEG Ztied.S, Pg/M, Ztied.S |
| NegateSaturate(Vector<Int64>) |
svint64_t svqneg[_s64]_m(svint64_t inativo, svbool_t pg, svint64_t op) svint64_t svqneg[_s64]_x(svbool_t pg, svint64_t op) svint64_t svqneg[_s64]_z(svbool_t pg, svint64_t op) SQNEG Ztied.D, Pg/M, Zop.D SQNEG Ztied.D, Pg/M, Ztied.D |
| NegateSaturate(Vector<SByte>) |
svint8_t svqneg[_s8]_m(svint8_t inativo, svbool_t pg, svint8_t op) svint8_t svqneg[_s8]_x(svbool_t pg, svint8_t op) svint8_t svqneg[_s8]_z(svbool_t pg, svint8_t op) SQNEG Ztied.B, Pg/M, Zop.B SQNEG Ztied.B, Pg/M, Ztied.B |
| NoMatch(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| NoMatch(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| NoMatch(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| NoMatch(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| PolynomialMultiply(Vector<Byte>, Vector<Byte>) |
svuint8_t svpmul[_u8](svuint8_t op1, svuint8_t op2) PMUL Zresult.B, Zop1.B, Zop2.B |
| PolynomialMultiply(Vector<SByte>, Vector<SByte>) |
svuint8_t svpmul[_u8](svuint8_t op1, svuint8_t op2) PMUL Zresult.B, Zop1.B, Zop2.B |
| PolynomialMultiplyWideningEven(Vector<Byte>, Vector<Byte>) |
svuint16_t svpmullb[_u16](svuint8_t op1, svuint8_t op2) PMULLB Zresult.H, Zop1.B, Zop2.B |
| PolynomialMultiplyWideningEven(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svpmullb[_u64](svuint32_t op1, svuint32_t op2) PMULLB Zresult.D, Zop1.S, Zop2.S |
| PolynomialMultiplyWideningOdd(Vector<Byte>, Vector<Byte>) |
svuint16_t svpmullt[_u16](svuint8_t op1, svuint8_t op2) PMULLT Zresult.H, Zop1.B, Zop2.B |
| PolynomialMultiplyWideningOdd(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svpmullt[_u64](svuint32_t op1, svuint32_t op2) PMULLT Zresult.D, Zop1.S, Zop2.S |
| ReciprocalEstimate(Vector<UInt32>) |
svuint32_t svrecpe[_u32]_m(svuint32_t inativo, svbool_t pg, svuint32_t op) svuint32_t svrecpe[_u32]_x(svbool_t pg, svuint32_t op) svuint32_t svrecpe[_u32]_z(svbool_t pg, svuint32_t op) URECPE Ztied.S, pg/M, Zop.S URECPE Ztied.S, pg/M, Ztied.S |
| ReciprocalSqrtEstimate(Vector<UInt32>) |
svuint32_t svrsqrte[_u32]_m(svuint32_t inativo, svbool_t pg, svuint32_t op) svuint32_t svrsqrte[_u32]_x(svbool_t pg, svuint32_t op) svuint32_t svrsqrte[_u32]_z(svbool_t pg, svuint32_t op) URSQRTE Ztied.S, Pg/M, Zop.S URSQRTE Ztied.S, Pg/M, Ztied.S |
| Scatter16BitNarrowingNonTemporal(Vector<Int64>, Int16*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitNarrowingNonTemporal(Vector<Int64>, Int16*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitNarrowingNonTemporal(Vector<Int64>, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitNarrowingNonTemporal(Vector<UInt64>, UInt16*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitNarrowingNonTemporal(Vector<UInt64>, UInt16*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitNarrowingNonTemporal(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<Int32>, Int16*, Vector<UInt32>, Vector<Int32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, Int16*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, Int16*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt32>, UInt16*, Vector<UInt32>, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, UInt16*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter16BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, UInt16*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<Int64>, Int32*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<Int64>, Int32*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<Int64>, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<UInt64>, UInt32*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<UInt64>, UInt32*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitNarrowingNonTemporal(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, Int32*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, Int32*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, UInt32*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter32BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, UInt32*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitNarrowingNonTemporal(Vector<Int64>, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitNarrowingNonTemporal(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<Int32>, SByte*, Vector<UInt32>, Vector<Int32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, SByte*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<Int64>, SByte*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt32>, Byte*, Vector<UInt32>, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, Byte*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| Scatter8BitWithByteOffsetsNarrowingNonTemporal(Vector<UInt64>, Byte*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Double>, Double*, Vector<Int64>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Double>, Double*, Vector<UInt64>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Double>, Vector<UInt64>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Int64>, Int64*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Int64>, Int64*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<Int64>, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<UInt64>, UInt64*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<UInt64>, UInt64*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterNonTemporal(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Double>, Double*, Vector<Int64>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Double>, Double*, Vector<UInt64>, Vector<Double>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Int32>, Int32*, Vector<UInt32>, Vector<Int32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Int64>, Int64*, Vector<Int64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Int64>, Int64*, Vector<UInt64>, Vector<Int64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<Single>, Single*, Vector<UInt32>, Vector<Single>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<UInt32>, UInt32*, Vector<UInt32>, Vector<UInt32>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<UInt64>, UInt64*, Vector<Int64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ScatterWithByteOffsetsNonTemporal(Vector<UInt64>, UInt64*, Vector<UInt64>, Vector<UInt64>) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftArithmeticRounded(Vector<Int16>, Vector<Int16>) |
svint16_t svrshl[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) SRSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftArithmeticRounded(Vector<Int32>, Vector<Int32>) |
svint32_t svrshl[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) SRSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftArithmeticRounded(Vector<Int64>, Vector<Int64>) |
svint64_t svrshl[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) SRSHL Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| ShiftArithmeticRounded(Vector<SByte>, Vector<SByte>) |
svint8_t svrshl[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) SRSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftArithmeticRoundedSaturate(Vector<Int16>, Vector<Int16>) |
svint16_t svqrshl[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) SQRSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftArithmeticRoundedSaturate(Vector<Int32>, Vector<Int32>) |
svint32_t svqrshl[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) SQRSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftArithmeticRoundedSaturate(Vector<Int64>, Vector<Int64>) |
svint64_t svqrshl[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) SQRSHL Ztied1.D, Pg/M, Ztied1.D, Zop2.D |
| ShiftArithmeticRoundedSaturate(Vector<SByte>, Vector<SByte>) |
svint8_t svqrshl[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) SQRSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftArithmeticSaturate(Vector<Int16>, Vector<Int16>) |
svint16_t svqshl[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) SQSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftArithmeticSaturate(Vector<Int32>, Vector<Int32>) |
svint32_t svqshl[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) SQSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftArithmeticSaturate(Vector<Int64>, Vector<Int64>) |
svint64_t svqshl[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) SQSHL Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| ShiftArithmeticSaturate(Vector<SByte>, Vector<SByte>) |
svint8_t svqshl[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) SQSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftLeftAndInsert(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svsli[_n_u8](svuint8_t op1, svuint8_t op2, uint64_t imm3) SLI Ztied1.B, Zop2.B, #imm3 |
| ShiftLeftAndInsert(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svsli[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3) SLI Ztied1.H, Zop2.H, #imm3 |
| ShiftLeftAndInsert(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svsli[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3) SLI Ztied1.S, Zop2.S, #imm3 |
| ShiftLeftAndInsert(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svsli[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3) SLI Ztied1.D, Zop2.D, #imm3 |
| ShiftLeftAndInsert(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svsli[_n_s8](svint8_t op1, svint8_t op2, uint64_t imm3) SLI Ztied1.B, Zop2.B, #imm3 |
| ShiftLeftAndInsert(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svsli[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3) SLI Ztied1.H, Zop2.H, #imm3 |
| ShiftLeftAndInsert(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svsli[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3) SLI Ztied1.S, Zop2.S, #imm3 |
| ShiftLeftAndInsert(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svsli[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3) SLI Ztied1.D, Zop2.D, #imm3 |
| ShiftLeftLogicalSaturate(Vector<Byte>, Vector<SByte>) |
svuint8_t svqshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2) UQSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftLeftLogicalSaturate(Vector<UInt16>, Vector<Int16>) |
svuint16_t svqshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) UQSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftLeftLogicalSaturate(Vector<UInt32>, Vector<Int32>) |
svuint32_t svqshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) UQSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftLeftLogicalSaturate(Vector<UInt64>, Vector<Int64>) |
svuint64_t svqshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) UQSHL Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| ShiftLeftLogicalSaturateUnsigned(Vector<Int16>, Byte) |
svuint16_t svqshlu[_n_s16]_m(svbool_t pg, svint16_t op1, uint64_t imm2) SQSHLU Ztied1.H, Pg/M, Ztied1.H, #imm2 |
| ShiftLeftLogicalSaturateUnsigned(Vector<Int32>, Byte) |
svuint32_t svqshlu[_n_s32]_m(svbool_t pg, svint32_t op1, uint64_t imm2) SQSHLU Ztied1.S, pg/M, Ztied1.S, #imm2 |
| ShiftLeftLogicalSaturateUnsigned(Vector<Int64>, Byte) |
svuint64_t svqshlu[_n_s64]_m(svbool_t pg, svint64_t op1, uint64_t imm2) SQSHLU Ztied1.D, Pg/M, Ztied1.D, #imm2 |
| ShiftLeftLogicalSaturateUnsigned(Vector<SByte>, Byte) |
svuint8_t svqshlu[_n_s8]_m(svbool_t pg, svint8_t op1, uint64_t imm2) SQSHLU Ztied1.B, Pg/M, Ztied1.B, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<Byte>, Byte) |
svuint16_t svshllb[_n_u16](svuint8_t op1, uint64_t imm2) USHLLB Zresult.H, Zop1.B, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<Int16>, Byte) |
svint32_t svshllb[_n_s32](svint16_t op1, uint64_t imm2) SSHLLB Zresult.S, Zop1.H, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<Int32>, Byte) |
svint64_t svshllb[_n_s64](svint32_t op1, uint64_t imm2) SSHLLB Zresult.D, Zop1.S, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<SByte>, Byte) |
svint16_t svshllb[_n_s16](svint8_t op1, uint64_t imm2) SSHLLB Zresult.H, Zop1.B, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<UInt16>, Byte) |
svuint32_t svshllb[_n_u32](svuint16_t op1, uint64_t imm2) USHLLB Zresult.S, Zop1.H, #imm2 |
| ShiftLeftLogicalWideningEven(Vector<UInt32>, Byte) |
svuint64_t svshllb[_n_u64](svuint32_t op1, uint64_t imm2) USHLLB Zresult.D, Zop1.S, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<Byte>, Byte) |
svuint16_t svshllt[_n_u16](svuint8_t op1, uint64_t imm2) USHLLT Zresult.H, Zop1.B, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<Int16>, Byte) |
svint32_t svshllt[_n_s32](svint16_t op1, uint64_t imm2) SSHLLT Zresult.S, Zop1.H, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<Int32>, Byte) |
svint64_t svshllt[_n_s64](svint32_t op1, uint64_t imm2) SSHLLT Zresult.D, Zop1.S, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<SByte>, Byte) |
svint16_t svshllt[_n_s16](svint8_t op1, uint64_t imm2) SSHLLT Zresult.H, Zop1.B, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<UInt16>, Byte) |
svuint32_t svshllt[_n_u32](svuint16_t op1, uint64_t imm2) USHLLT Zresult.S, Zop1.H, #imm2 |
| ShiftLeftLogicalWideningOdd(Vector<UInt32>, Byte) |
svuint64_t svshllt[_n_u64](svuint32_t op1, uint64_t imm2) USHLLT Zresult.D, Zop1.S, #imm2 |
| ShiftLogicalRounded(Vector<Byte>, Vector<SByte>) |
svuint8_t svrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2) URSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftLogicalRounded(Vector<UInt16>, Vector<Int16>) |
svuint16_t svrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) URSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftLogicalRounded(Vector<UInt32>, Vector<Int32>) |
svuint32_t svrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) URSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftLogicalRounded(Vector<UInt64>, Vector<Int64>) |
svuint64_t svrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) URSHL Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| ShiftLogicalRoundedSaturate(Vector<Byte>, Vector<SByte>) |
svuint8_t svqrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2) UQRSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B |
| ShiftLogicalRoundedSaturate(Vector<UInt16>, Vector<Int16>) |
svuint16_t svqrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) UQRSHL Ztied1.H, pg/M, Ztied1.H, Zop2.H |
| ShiftLogicalRoundedSaturate(Vector<UInt32>, Vector<Int32>) |
svuint32_t svqrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) UQRSHL Ztied1.S, pg/M, Ztied1.S, Zop2.S |
| ShiftLogicalRoundedSaturate(Vector<UInt64>, Vector<Int64>) |
svuint64_t svqrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) UQRSHL Ztied1.D, pg/M, Ztied1.D, Zop2.D |
| ShiftRightAndInsert(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svsri[_n_u8](svuint8_t op1, svuint8_t op2, uint64_t imm3) SRI Ztied1.B, Zop2.B, #imm3 |
| ShiftRightAndInsert(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svsri[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3) SRI Ztied1.H, Zop2.H, #imm3 |
| ShiftRightAndInsert(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svsri[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3) SRI Ztied1.S, Zop2.S, #imm3 |
| ShiftRightAndInsert(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svsri[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3) SRI Ztied1.D, Zop2.D, #imm3 |
| ShiftRightAndInsert(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svsri[_n_s8](svint8_t op1, svint8_t op2, uint64_t imm3) SRI Ztied1.B, Zop2.B, #imm3 |
| ShiftRightAndInsert(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svsri[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3) SRI Ztied1.H, Zop2.H, #imm3 |
| ShiftRightAndInsert(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svsri[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3) SRI Ztied1.S, Zop2.S, #imm3 |
| ShiftRightAndInsert(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svsri[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3) SRI Ztied1.D, Zop2.D, #imm3 |
| ShiftRightArithmeticAdd(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svsra[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3) SSRA Ztied1.H, Zop2.H, #imm3 |
| ShiftRightArithmeticAdd(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svsra[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3) SSRA Ztied1.S, Zop2.S, #imm3 |
| ShiftRightArithmeticAdd(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svsra[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3) SSRA Ztied1.D, Zop2.D, #imm3 |
| ShiftRightArithmeticAdd(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svsra[_n_s8](svint8_t op1, svint8_t op2, uint64_t imm3) SSRA Ztied1.B, Zop2.B, #imm3 |
| ShiftRightArithmeticNarrowingSaturateEven(Vector<Int16>, Byte) |
svint8_t svqshrnb[_n_s16](svint16_t op1, uint64_t imm2) SQSHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightArithmeticNarrowingSaturateEven(Vector<Int32>, Byte) |
svint16_t svqshrnb[_n_s32](svint32_t op1, uint64_t imm2) SQSHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightArithmeticNarrowingSaturateEven(Vector<Int64>, Byte) |
svint32_t svqshrnb[_n_s64](svint64_t op1, uint64_t imm2) SQSHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightArithmeticNarrowingSaturateOdd(Vector<Int16>, Vector<Int32>, Byte) |
svint16_t svqshrnt[_n_s32](svint16_t par, svint32_t op1, uint64_t imm2) SQSHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightArithmeticNarrowingSaturateOdd(Vector<Int32>, Vector<Int64>, Byte) |
svint32_t svqshrnt[_n_s64](svint32_t par, svint64_t op1, uint64_t imm2) SQSHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightArithmeticNarrowingSaturateOdd(Vector<SByte>, Vector<Int16>, Byte) |
svint8_t svqshrnt[_n_s16](svint8_t par, svint16_t op1, uint64_t imm2) SQSHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedEven(Vector<Int16>, Byte) |
svuint8_t svqshrunb[_n_s16](svint16_t op1, uint64_t imm2) SQSHRUNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedEven(Vector<Int32>, Byte) |
svuint16_t svqshrunb[_n_s32](svint32_t op1, uint64_t imm2) SQSHRUNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedEven(Vector<Int64>, Byte) |
svuint32_t svqshrunb[_n_s64](svint64_t op1, uint64_t imm2) SQSHSHRUNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedOdd(Vector<Byte>, Vector<Int16>, Byte) |
svuint8_t svqshrunt[_n_s16](svuint8_t par, svint16_t op1, uint64_t imm2) SQSHRUNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedOdd(Vector<UInt16>, Vector<Int32>, Byte) |
svuint16_t svqshrunt[_n_s32](svuint16_t par, svint32_t op1, uint64_t imm2) SQSHRUNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightArithmeticNarrowingSaturateUnsignedOdd(Vector<UInt32>, Vector<Int64>, Byte) |
svuint32_t svqshrunt[_n_s64](svuint32_t par, svint64_t op1, uint64_t imm2) SQSHRUNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightArithmeticRounded(Vector<Int16>, Byte) |
svint16_t svrshr[_n_s16]_m(svbool_t pg, svint16_t op1, uint64_t imm2) SRSHR Ztied1.H, Pg/M, Ztied1.H, #imm2 |
| ShiftRightArithmeticRounded(Vector<Int32>, Byte) |
svint32_t svrshr[_n_s32]_m(svbool_t pg, svint32_t op1, uint64_t imm2) SRSHR Ztied1.S, pg/M, Ztied1.S, #imm2 |
| ShiftRightArithmeticRounded(Vector<Int64>, Byte) |
svint64_t svrshr[_n_s64]_m(svbool_t pg, svint64_t op1, uint64_t imm2) SRSHR Ztied1.D, pg/M, Ztied1.D, #imm2 |
| ShiftRightArithmeticRounded(Vector<SByte>, Byte) |
svint8_t svrshr[_n_s8]_m(svbool_t pg, svint8_t op1, uint64_t imm2) SRSHR Ztied1.B, Pg/M, Ztied1.B, #imm2 |
| ShiftRightArithmeticRoundedAdd(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svrsra[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3) SRSRA Ztied1.H, Zop2.H, #imm3 |
| ShiftRightArithmeticRoundedAdd(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svrsra[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3) SRSRA Ztied1.S, Zop2.S, #imm3 |
| ShiftRightArithmeticRoundedAdd(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svrsra[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3) SRSRA Ztied1.D, Zop2.D, #imm3 |
| ShiftRightArithmeticRoundedAdd(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svrsra[_n_s8](svint8_t op1, svint8_t op2, uint64_t imm3) SRSRA Ztied1.B, Zop2.B, #imm3 |
| ShiftRightArithmeticRoundedNarrowingSaturateEven(Vector<Int16>, Byte) |
svint8_t svqrshrnb[_n_s16](svint16_t op1, uint64_t imm2) SQRSHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateEven(Vector<Int32>, Byte) |
svint16_t svqrshrnb[_n_s32](svint32_t op1, uint64_t imm2) SQRSHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateEven(Vector<Int64>, Byte) |
svint32_t svqrshrnb[_n_s64](svint64_t op1, uint64_t imm2) SQRSHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateOdd(Vector<Int16>, Vector<Int32>, Byte) |
svint16_t svqrshrnt[_n_s32](svint16_t par, svint32_t op1, uint64_t imm2) SQRSHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateOdd(Vector<Int32>, Vector<Int64>, Byte) |
svint32_t svqrshrnt[_n_s64](svint32_t par, svint64_t op1, uint64_t imm2) SQRSHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateOdd(Vector<SByte>, Vector<Int16>, Byte) |
svint8_t svqrshrnt[_n_s16](svint8_t par, svint16_t op1, uint64_t imm2) SQRSHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedEven(Vector<Int16>, Byte) |
svuint8_t svqrshrunb[_n_s16](svint16_t op1, uint64_t imm2) SQRSHRUNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedEven(Vector<Int32>, Byte) |
svuint16_t svqrshrunb[_n_s32](svint32_t op1, uint64_t imm2) SQRSHRUNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedEven(Vector<Int64>, Byte) |
svuint32_t svqrshrunb[_n_s64](svint64_t op1, uint64_t imm2) SQRSHRUNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedOdd(Vector<Byte>, Vector<Int16>, Byte) |
svuint8_t svqrshrunt[_n_s16](svuint8_t par, svint16_t op1, uint64_t imm2) SQRSHRUNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedOdd(Vector<UInt16>, Vector<Int32>, Byte) |
svuint16_t svqrshrunt[_n_s32](svuint16_t par, svint32_t op1, uint64_t imm2) SQRSHRUNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightArithmeticRoundedNarrowingSaturateUnsignedOdd(Vector<UInt32>, Vector<Int64>, Byte) |
svuint32_t svqrshrunt[_n_s64](svuint32_t par, svint64_t op1, uint64_t imm2) SQRSHRUNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightLogicalAdd(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svsra[_n_u8](svuint8_t op1, svuint8_t op2, uint64_t imm3) USRA Ztied1.B, Zop2.B, #imm3 |
| ShiftRightLogicalAdd(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svsra[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3) USRA Ztied1.H, Zop2.H, #imm3 |
| ShiftRightLogicalAdd(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svsra[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3) USRA Ztied1.S, Zop2.S, #imm3 |
| ShiftRightLogicalAdd(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svsra[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3) USRA Ztied1.D, Zop2.D, #imm3 |
| ShiftRightLogicalNarrowingEven(Vector<Int16>, Byte) |
svint8_t svshrnb[_n_s16](svint16_t op1, uint64_t imm2) SHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightLogicalNarrowingEven(Vector<Int32>, Byte) |
svint16_t svshrnb[_n_s32](svint32_t op1, uint64_t imm2) SHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightLogicalNarrowingEven(Vector<Int64>, Byte) |
svint32_t svshrnb[_n_s64](svint64_t op1, uint64_t imm2) SHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightLogicalNarrowingEven(Vector<UInt16>, Byte) |
svuint8_t svshrnb[_n_u16](svuint16_t op1, uint64_t imm2) SHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightLogicalNarrowingEven(Vector<UInt32>, Byte) |
svuint16_t svshrnb[_n_u32](svuint32_t op1, uint64_t imm2) SHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightLogicalNarrowingEven(Vector<UInt64>, Byte) |
svuint32_t svshrnb[_n_u64](svuint64_t op1, uint64_t imm2) SHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<Byte>, Vector<UInt16>, Byte) |
svuint8_t svshrnt[_n_u16](svuint8_t par, svuint16_t op1, uint64_t imm2) SHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<Int16>, Vector<Int32>, Byte) |
svint16_t svshrnt[_n_s32](svint16_t par, svint32_t op1, uint64_t imm2) SHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<Int32>, Vector<Int64>, Byte) |
svint32_t svshrnt[_n_s64](svint32_t par, svint64_t op1, uint64_t imm2) SHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<SByte>, Vector<Int16>, Byte) |
svint8_t svshrnt[_n_s16](svint8_t par, svint16_t op1, uint64_t imm2) SHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Byte) |
svuint16_t svshrnt[_n_u32](svuint16_t par, svuint32_t op1, uint64_t imm2) SHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightLogicalNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Byte) |
svuint32_t svshrnt[_n_u64](svuint32_t par, svuint64_t op1, uint64_t imm2) SHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightLogicalNarrowingSaturateEven(Vector<UInt16>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalNarrowingSaturateEven(Vector<UInt32>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalNarrowingSaturateEven(Vector<UInt64>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalNarrowingSaturateOdd(Vector<Byte>, Vector<UInt16>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalNarrowingSaturateOdd(Vector<UInt16>, Vector<UInt32>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalNarrowingSaturateOdd(Vector<UInt32>, Vector<UInt64>, Byte) |
Esta classe fornece acesso às instruções de hardware ARM SVE através de intrínsecos |
| ShiftRightLogicalRounded(Vector<Byte>, Byte) |
svuint8_t svrshr[_n_u8]_m(svbool_t pg, svuint8_t op1, uint64_t imm2) URSHR Ztied1.B, Pg/M, Ztied1.B, #imm2 |
| ShiftRightLogicalRounded(Vector<UInt16>, Byte) |
svuint16_t svrshr[_n_u16]_m(svbool_t pg, svuint16_t op1, uint64_t imm2) URSHR Ztied1.H, pg/M, Ztied1.H, #imm2 |
| ShiftRightLogicalRounded(Vector<UInt32>, Byte) |
svuint32_t svrshr[_n_u32]_m(svbool_t pg, svuint32_t op1, uint64_t imm2) URSHR Ztied1.S, Pg/M, Ztied1.S, #imm2 |
| ShiftRightLogicalRounded(Vector<UInt64>, Byte) |
svuint64_t svrshr[_n_u64]_m(svbool_t pg, svuint64_t op1, uint64_t imm2) URSHR Ztied1.D, Pg/M, Ztied1.D, #imm2 |
| ShiftRightLogicalRoundedAdd(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svrsra[_n_u8](svuint8_t op1, svuint8_t op2, uint64_t imm3) URSRA Ztied1.B, Zop2.B, #imm3 |
| ShiftRightLogicalRoundedAdd(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svrsra[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3) URSRA Ztied1.H, Zop2.H, #imm3 |
| ShiftRightLogicalRoundedAdd(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svrsra[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3) URSRA Ztied1.S, Zop2.S, #imm3 |
| ShiftRightLogicalRoundedAdd(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svrsra[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3) URSRA Ztied1.D, Zop2.D, #imm3 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<Int16>, Byte) |
svint8_t svrshrnb[_n_s16](svint16_t op1, uint64_t imm2) RSHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<Int32>, Byte) |
svint16_t svrshrnb[_n_s32](svint32_t op1, uint64_t imm2) RSHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<Int64>, Byte) |
svint32_t svrshrnb[_n_s64](svint64_t op1, uint64_t imm2) RSHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<UInt16>, Byte) |
svuint8_t svrshrnb[_n_u16](svuint16_t op1, uint64_t imm2) RSHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<UInt32>, Byte) |
svuint16_t svrshrnb[_n_u32](svuint32_t op1, uint64_t imm2) RSHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingEven(Vector<UInt64>, Byte) |
svuint32_t svrshrnb[_n_u64](svuint64_t op1, uint64_t imm2) RSHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<Byte>, Vector<UInt16>, Byte) |
svuint8_t svrshrnt[_n_u16](svuint8_t par, svuint16_t op1, uint64_t imm2) RSHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<Int16>, Vector<Int32>, Byte) |
svint16_t svrshrnt[_n_s32](svint16_t par, svint32_t op1, uint64_t imm2) RSHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<Int32>, Vector<Int64>, Byte) |
svint32_t svrshrnt[_n_s64](svint32_t par, svint64_t op1, uint64_t imm2) RSHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<SByte>, Vector<Int16>, Byte) |
svint8_t svrshrnt[_n_s16](svint8_t par, svint16_t op1, uint64_t imm2) RSHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Byte) |
svuint16_t svrshrnt[_n_u32](svuint16_t par, svuint32_t op1, uint64_t imm2) RSHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Byte) |
svuint32_t svrshrnt[_n_u64](svuint32_t par, svuint64_t op1, uint64_t imm2) RSHRNT Ztied.S, Zop1.D, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateEven(Vector<UInt16>, Byte) |
svuint8_t svqrshrnb[_n_u16](svuint16_t op1, uint64_t imm2) UQRSHRNB Zresult.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateEven(Vector<UInt32>, Byte) |
svuint16_t svqrshrnb[_n_u32](svuint32_t op1, uint64_t imm2) UQRSHRNB Zresult.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateEven(Vector<UInt64>, Byte) |
svuint32_t svqrshrnb[_n_u64](svuint64_t op1, uint64_t imm2) UQRSHRNB Zresult.S, Zop1.D, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateOdd(Vector<Byte>, Vector<UInt16>, Byte) |
svuint8_t svqrshrnt[_n_u16](svuint8_t par, svuint16_t op1, uint64_t imm2) UQRSHRNT Ztied.B, Zop1.H, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateOdd(Vector<UInt16>, Vector<UInt32>, Byte) |
svuint16_t svqrshrnt[_n_u32](svuint16_t par, svuint32_t op1, uint64_t imm2) UQRSHRNT Ztied.H, Zop1.S, #imm2 |
| ShiftRightLogicalRoundedNarrowingSaturateOdd(Vector<UInt32>, Vector<UInt64>, Byte) |
svuint32_t svqrshrnt[_n_u64](svuint32_t par, svuint64_t op1, uint64_t imm2) UQRSHRNT Ztied.S, Zop1.D, #imm2 |
| SubtractBorrowWideningEven(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svsbclb[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) SBCLB Ztied1.S, Zop2.S, Zop3.S |
| SubtractBorrowWideningEven(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svsbclb[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) SBCLB Ztied1.D, Zop2.D, Zop3.D |
| SubtractBorrowWideningOdd(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svsbclt[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) SBCLT Ztied1.S, Zop2.S, Zop3.S |
| SubtractBorrowWideningOdd(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svsbclt[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) SBCLT Ztied1.D, Zop2.D, Zop3.D |
| SubtractHighNarrowingEven(Vector<Int16>, Vector<Int16>) |
svint8_t svsubhnb[_s16](svint16_t op1, svint16_t op2) SUBHNB Zresult.B, Zop1.H, Zop2.H |
| SubtractHighNarrowingEven(Vector<Int32>, Vector<Int32>) |
svint16_t svsubhnb[_s32](svint32_t op1, svint32_t op2) SUBHNB Zresult.H, Zop1.S, Zop2.S |
| SubtractHighNarrowingEven(Vector<Int64>, Vector<Int64>) |
svint32_t svsubhnb[_s64](svint64_t op1, svint64_t op2) SUBHNB Zresult.S, Zop1.D, Zop2.D |
| SubtractHighNarrowingEven(Vector<UInt16>, Vector<UInt16>) |
svuint8_t svsubhnb[_u16](svuint16_t op1, svuint16_t op2) SUBHNB Zresult.B, Zop1.H, Zop2.H |
| SubtractHighNarrowingEven(Vector<UInt32>, Vector<UInt32>) |
svuint16_t svsubhnb[_u32](svuint32_t op1, svuint32_t op2) SUBHNB Zresult.H, Zop1.S, Zop2.S |
| SubtractHighNarrowingEven(Vector<UInt64>, Vector<UInt64>) |
svuint32_t svsubhnb[_u64](svuint64_t op1, svuint64_t op2) SUBHNB Zresult.S, Zop1.D, Zop2.D |
| SubtractHighNarrowingOdd(Vector<Byte>, Vector<UInt16>, Vector<UInt16>) |
svuint8_t svsubhnt[_u16](svuint8_t par, svuint16_t op1, svuint16_t op2) SUBHNT Ztied.B, Zop1.H, Zop2.H |
| SubtractHighNarrowingOdd(Vector<Int16>, Vector<Int32>, Vector<Int32>) |
svint16_t svsubhnt[_s32](svint16_t par, svint32_t op1, svint32_t op2) SUBHNT Ztied.H, Zop1.S, Zop2.S |
| SubtractHighNarrowingOdd(Vector<Int32>, Vector<Int64>, Vector<Int64>) |
svint32_t svsubhnt[_s64](svint32_t even, svint64_t op1, svint64_t op2) SUBHNT Ztied.S, Zop1.D, Zop2.D |
| SubtractHighNarrowingOdd(Vector<SByte>, Vector<Int16>, Vector<Int16>) |
svint8_t svsubhnt[_s16](svint8_t par, svint16_t op1, svint16_t op2) SUBHNT Ztied.B, Zop1.H, Zop2.H |
| SubtractHighNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Vector<UInt32>) |
svuint16_t svsubhnt[_u32](svuint16_t par, svuint32_t op1, svuint32_t op2) SUBHNT Ztied.H, Zop1.S, Zop2.S |
| SubtractHighNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Vector<UInt64>) |
svuint32_t svsubhnt[_u64](svuint32_t even, svuint64_t op1, svuint64_t op2) SUBHNT Ztied.S, Zop1.D, Zop2.D |
| SubtractRoundedHighNarrowingEven(Vector<Int16>, Vector<Int16>) |
svint8_t svrsubhnb[_s16](svint16_t op1, svint16_t op2) RSUBHNB Zresult.B, Zop1.H, Zop2.H |
| SubtractRoundedHighNarrowingEven(Vector<Int32>, Vector<Int32>) |
svint16_t svrsubhnb[_s32](svint32_t op1, svint32_t op2) RSUBHNB Zresult.H, Zop1.S, Zop2.S |
| SubtractRoundedHighNarrowingEven(Vector<Int64>, Vector<Int64>) |
svint32_t svrsubhnb[_s64](svint64_t op1, svint64_t op2) RSUBHNB Zresult.S, Zop1.D, Zop2.D |
| SubtractRoundedHighNarrowingEven(Vector<UInt16>, Vector<UInt16>) |
svuint8_t svrsubhnb[_u16](svuint16_t op1, svuint16_t op2) RSUBHNB Zresult.B, Zop1.H, Zop2.H |
| SubtractRoundedHighNarrowingEven(Vector<UInt32>, Vector<UInt32>) |
svuint16_t svrsubhnb[_u32](svuint32_t op1, svuint32_t op2) RSUBHNB Zresult.H, Zop1.S, Zop2.S |
| SubtractRoundedHighNarrowingEven(Vector<UInt64>, Vector<UInt64>) |
svuint32_t svrsubhnb[_u64](svuint64_t op1, svuint64_t op2) RSUBHNB Zresult.S, Zop1.D, Zop2.D |
| SubtractRoundedHighNarrowingOdd(Vector<Byte>, Vector<UInt16>, Vector<UInt16>) |
svuint8_t svrsubhnt[_u16](svuint8_t even, svuint16_t op1, svuint16_t op2) RSUBHNT Ztied.B, Zop1.H, Zop2.H |
| SubtractRoundedHighNarrowingOdd(Vector<Int16>, Vector<Int32>, Vector<Int32>) |
svint16_t svrsubhnt[_s32](svint16_t par, svint32_t op1, svint32_t op2) RSUBHNT Ztied.H, Zop1.S, Zop2.S |
| SubtractRoundedHighNarrowingOdd(Vector<Int32>, Vector<Int64>, Vector<Int64>) |
svint32_t svrsubhnt[_s64](svint32_t par, svint64_t op1, svint64_t op2) RSUBHNT Ztied.S, Zop1.D, Zop2.D |
| SubtractRoundedHighNarrowingOdd(Vector<SByte>, Vector<Int16>, Vector<Int16>) |
svint8_t svrsubhnt[_s16](svint8_t par, svint16_t op1, svint16_t op2) RSUBHNT Ztied.B, Zop1.H, Zop2.H |
| SubtractRoundedHighNarrowingOdd(Vector<UInt16>, Vector<UInt32>, Vector<UInt32>) |
svuint16_t svrsubhnt[_u32](svuint16_t par, svuint32_t op1, svuint32_t op2) RSUBHNT Ztied.H, Zop1.S, Zop2.S |
| SubtractRoundedHighNarrowingOdd(Vector<UInt32>, Vector<UInt64>, Vector<UInt64>) |
svuint32_t svrsubhnt[_u64](svuint32_t even, svuint64_t op1, svuint64_t op2) RSUBHNT Ztied.S, Zop1.D, Zop2.D |
| SubtractSaturate(Vector<Byte>, Vector<Byte>) |
svuint8_t svqsub[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svqsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) svuint8_t svqsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B UQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B UQSUB Zresult.B, Zop1.B, Zop2.B |
| SubtractSaturate(Vector<Int16>, Vector<Int16>) |
svint16_t svqsub[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svqsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) svint16_t svqsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H SQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H SQSUB Zresult.H, Zop1.H, Zop2.H |
| SubtractSaturate(Vector<Int32>, Vector<Int32>) |
svint32_t svqsub[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svqsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) svint32_t svqsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S SQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S SQSUB Zresult.S, Zop1.S, Zop2.S |
| SubtractSaturate(Vector<Int64>, Vector<Int64>) |
svint64_t svqsub[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svqsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) svint64_t svqsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D SQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D SQSUB Zresult.D, Zop1.D, Zop2.D |
| SubtractSaturate(Vector<SByte>, Vector<SByte>) |
svint8_t svqsub[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svqsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) svint8_t svqsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B SQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B SQSUB Zresult.B, Zop1.B, Zop2.B |
| SubtractSaturate(Vector<UInt16>, Vector<UInt16>) |
svuint16_t svqsub[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svqsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) svuint16_t svqsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H UQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H UQSUB Zresult.H, Zop1.H, Zop2.H |
| SubtractSaturate(Vector<UInt32>, Vector<UInt32>) |
svuint32_t svqsub[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svqsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) svuint32_t svqsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S UQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S UQSUB Zresult.S, Zop1.S, Zop2.S |
| SubtractSaturate(Vector<UInt64>, Vector<UInt64>) |
svuint64_t svqsub[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svqsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) svuint64_t svqsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D UQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D UQSUB, Zresult.D, Zop1.D, Zop2.D |
| SubtractWideningEven(Vector<Byte>, Vector<Byte>) |
svuint16_t svsublb[_u16](svuint8_t op1, svuint8_t op2) USUBLB Zresult.H, Zop1.B, Zop2.B |
| SubtractWideningEven(Vector<Int16>, Vector<Int16>) |
svint32_t svsublb[_s32](svint16_t op1, svint16_t op2) SSUBLB Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningEven(Vector<Int16>, Vector<SByte>) |
svint16_t svsubwb[_s16](svint16_t op1, svint8_t op2) SSUBWB Zresult.H, Zop1.H, Zop2.B |
| SubtractWideningEven(Vector<Int32>, Vector<Int16>) |
svint32_t svsubwb[_s32](svint32_t op1, svint16_t op2) SSUBWB Zresult.S, Zop1.S, Zop2.H |
| SubtractWideningEven(Vector<Int32>, Vector<Int32>) |
svint64_t svsublb[_s64](svint32_t op1, svint32_t op2) SSUBLB Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningEven(Vector<Int64>, Vector<Int32>) |
svint64_t svsubwb[_s64](svint64_t op1, svint32_t op2) SSUBWB Zresult.D, Zop1.D, Zop2.S |
| SubtractWideningEven(Vector<SByte>, Vector<SByte>) |
svint16_t svsublb[_s16](svint8_t op1, svint8_t op2) SSUBLB Zresult.H, Zop1.B, Zop2.B |
| SubtractWideningEven(Vector<UInt16>, Vector<Byte>) |
svuint16_t svsubwb[_u16](svuint16_t op1, svuint8_t op2) USUBWB Zresult.H, Zop1.H, Zop2.B |
| SubtractWideningEven(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svsublb[_u32](svuint16_t op1, svuint16_t op2) USUBLB Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningEven(Vector<UInt32>, Vector<UInt16>) |
svuint32_t svsubwb[_u32](svuint32_t op1, svuint16_t op2) USUBWB Zresult.S, Zop1.S, Zop2.H |
| SubtractWideningEven(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svsublb[_u64](svuint32_t op1, svuint32_t op2) USUBLB Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningEven(Vector<UInt64>, Vector<UInt32>) |
svuint64_t svsubwb[_u64](svuint64_t op1, svuint32_t op2) USUBWB Zresult.D, Zop1.D, Zop2.S |
| SubtractWideningEvenOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svsublbt[_s32](svint16_t op1, svint16_t op2) SSUBLBT Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningEvenOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svsublbt[_s64](svint32_t op1, svint32_t op2) SSUBLBT Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningEvenOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svsublbt[_s16](svint8_t op1, svint8_t op2) SSUBLBT Zresult.H, Zop1.B, Zop2.B |
| SubtractWideningOdd(Vector<Byte>, Vector<Byte>) |
svuint16_t svsublt[_u16](svuint8_t op1, svuint8_t op2) USUBLT Zresult.H, Zop1.B, Zop2.B |
| SubtractWideningOdd(Vector<Int16>, Vector<Int16>) |
svint32_t svsublt[_s32](svint16_t op1, svint16_t op2) SSUBLT Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningOdd(Vector<Int16>, Vector<SByte>) |
svint16_t svsubwt[_s16](svint16_t op1, svint8_t op2) SSUBWT Zresult.H, Zop1.H, Zop2.B |
| SubtractWideningOdd(Vector<Int32>, Vector<Int16>) |
svint32_t svsubwt[_s32](svint32_t op1, svint16_t op2) SSUBWT Zresult.S, Zop1.S, Zop2.H |
| SubtractWideningOdd(Vector<Int32>, Vector<Int32>) |
svint64_t svsublt[_s64](svint32_t op1, svint32_t op2) SSUBLT Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningOdd(Vector<Int64>, Vector<Int32>) |
svint64_t svsubwt[_s64](svint64_t op1, svint32_t op2) SSUBWT Zresult.D, Zop1.D, Zop2.S |
| SubtractWideningOdd(Vector<SByte>, Vector<SByte>) |
svint16_t svsublt[_s16](svint8_t op1, svint8_t op2) SSUBLT Zresult.H, Zop1.B, Zop2.B |
| SubtractWideningOdd(Vector<UInt16>, Vector<Byte>) |
svuint16_t svsubwt[_u16](svuint16_t op1, svuint8_t op2) USUBWT Zresult.H, Zop1.H, Zop2.B |
| SubtractWideningOdd(Vector<UInt16>, Vector<UInt16>) |
svuint32_t svsublt[_u32](svuint16_t op1, svuint16_t op2) USUBLT Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningOdd(Vector<UInt32>, Vector<UInt16>) |
svuint32_t svsubwt[_u32](svuint32_t op1, svuint16_t op2) USUBWT Zresult.S, Zop1.S, Zop2.H |
| SubtractWideningOdd(Vector<UInt32>, Vector<UInt32>) |
svuint64_t svsublt[_u64](svuint32_t op1, svuint32_t op2) USUBLT Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningOdd(Vector<UInt64>, Vector<UInt32>) |
svuint64_t svsubwt[_u64](svuint64_t op1, svuint32_t op2) USUBWT Zresult.D, Zop1.D, Zop2.S |
| SubtractWideningOddEven(Vector<Int16>, Vector<Int16>) |
svint32_t svsubltb[_s32](svint16_t op1, svint16_t op2) SSUBLTB Zresult.S, Zop1.H, Zop2.H |
| SubtractWideningOddEven(Vector<Int32>, Vector<Int32>) |
svint64_t svsubltb[_s64](svint32_t op1, svint32_t op2) SSUBLTB Zresult.D, Zop1.S, Zop2.S |
| SubtractWideningOddEven(Vector<SByte>, Vector<SByte>) |
svint16_t svsubltb[_s16](svint8_t op1, svint8_t op2) SSUBLTB Zresult.H, Zop1.B, Zop2.B |
| ToString() |
Devolve uma cadeia que representa o objeto atual. (Herdado de Object) |
| VectorTableLookup(ValueTuple<Vector<Byte>,Vector<Byte>>, Vector<Byte>) |
svuint8_t svtbl2[_u8](svuint8x2_t dados, svuint8_t índices) TBL Zd.B, { Zn1.B, Zn2.B }, Zm.B |
| VectorTableLookup(ValueTuple<Vector<Double>,Vector<Double>>, Vector<UInt64>) |
svfloat64_t svtbl2[_f64](svfloat64x2_t dados, svuint64_t índices) TBL Zd.D, { Zn1.D, Zn2.D }, Zm.D |
| VectorTableLookup(ValueTuple<Vector<Int16>,Vector<Int16>>, Vector<UInt16>) |
svint16_t svtbl2[_s16](svint16x2_t dados, svuint16_t índices) TBL Zd.H, { Zn1.H, Zn2.H }, Zm.H |
| VectorTableLookup(ValueTuple<Vector<Int32>,Vector<Int32>>, Vector<UInt32>) |
svint32_t svtbl2[_s32](svint32x2_t dados, svuint32_t índices) TBL Zd.S, { Zn1.S, Zn2.S }, Zm.S |
| VectorTableLookup(ValueTuple<Vector<Int64>,Vector<Int64>>, Vector<UInt64>) |
svint64_t svtbl2[_s64](svint64x2_t dados, svuint64_t índices) TBL Zd.D, { Zn1.D, Zn2.D }, Zm.D |
| VectorTableLookup(ValueTuple<Vector<SByte>,Vector<SByte>>, Vector<Byte>) |
svint8_t svtbl2[_s8](svint8x2_t dados, svuint8_t índices) TBL Zd.B, { Zn1.B, Zn2.B }, Zm.B |
| VectorTableLookup(ValueTuple<Vector<Single>,Vector<Single>>, Vector<UInt32>) |
svfloat32_t svtbl2[_f32](svfloat32x2_t data, svuint32_t índices) TBL Zd.S, { Zn1.S, Zn2.S }, Zm.S |
| VectorTableLookup(ValueTuple<Vector<UInt16>,Vector<UInt16>>, Vector<UInt16>) |
svuint16_t svtbl2[_u16](svuint16x2_t dados, svuint16_t índices) TBL Zd.H, { Zn1.H, Zn2.H }, Zm.H |
| VectorTableLookup(ValueTuple<Vector<UInt32>,Vector<UInt32>>, Vector<UInt32>) |
svuint32_t svtbl2[_u32](svuint32x2_t data, svuint32_t índices) TBL Zd.S, { Zn1.S, Zn2.S }, Zm.S |
| VectorTableLookup(ValueTuple<Vector<UInt64>,Vector<UInt64>>, Vector<UInt64>) |
svuint64_t svtbl2[_u64](svuint64x2_t dados, svuint64_t índices) TBL Zd.D, { Zn1.D, Zn2.D }, Zm.D |
| VectorTableLookupExtension(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t svtbx[_u8](svuint8_t fallback, svuint8_t dados, svuint8_t índices) TBX Zd.B, Zn.B, Zm.B |
| VectorTableLookupExtension(Vector<Double>, Vector<Double>, Vector<UInt64>) |
svfloat64_t svtbx[_f64](svfloat64_t reserva, dados de svfloat64_t, svuint64_t índices) TBX Zd.D, Zn.D, Zm.D |
| VectorTableLookupExtension(Vector<Int16>, Vector<Int16>, Vector<UInt16>) |
svint16_t svtbx[_s16](svint16_t fallback, svint16_t dados, svuint16_t índices) TBX Zd.H, Zn.H, Zm.H |
| VectorTableLookupExtension(Vector<Int32>, Vector<Int32>, Vector<UInt32>) |
svint32_t svtbx[_s32](svint32_t fallback, dados de svint32_t, svuint32_t índices) TBX Zd.S, Zn.S, Zm.S |
| VectorTableLookupExtension(Vector<Int64>, Vector<Int64>, Vector<UInt64>) |
svint64_t svtbx[_s64](svint64_t Fallback, svint64_t dados, svuint64_t índices) TBX Zd.D, Zn.D, Zm.D |
| VectorTableLookupExtension(Vector<SByte>, Vector<SByte>, Vector<Byte>) |
svint8_t svtbx[_s8](svint8_t fallback, svint8_t dados, svuint8_t índices) TBX Zd.B, Zn.B, Zm.B |
| VectorTableLookupExtension(Vector<Single>, Vector<Single>, Vector<UInt32>) |
svfloat32_t svtbx[_f32](svfloat32_t reserva, svfloat32_t dados, svuint32_t índices) TBX Zd.S, Zn.S, Zm.S |
| VectorTableLookupExtension(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t svtbx[_u16](svuint16_t recurso, dados de svuint16_t, svuint16_t índices) TBX Zd.H, Zn.H, Zm.H |
| VectorTableLookupExtension(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t svtbx[_u32](svuint32_t reserva, dados de svuint32_t, índices svuint32_t) TBX Zd.S, Zn.S, Zm.S |
| VectorTableLookupExtension(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t svtbx[_u64](svuint64_t Fallback, svuint64_t dados, svuint64_t índices) TBX Zd.D, Zn.D, Zm.D |
| Xor(Vector<Byte>, Vector<Byte>, Vector<Byte>) |
svuint8_t sveor3[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<Int16>, Vector<Int16>, Vector<Int16>) |
svint16_t sveor3[_s16](svint16_t op1, svint16_t op2, svint16_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<Int32>, Vector<Int32>, Vector<Int32>) |
svint32_t sveor3[_s32](svint32_t op1, svint32_t op2, svint32_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<Int64>, Vector<Int64>, Vector<Int64>) |
svint64_t sveor3[_s64](svint64_t op1, svint64_t op2, svint64_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<SByte>, Vector<SByte>, Vector<SByte>) |
svint8_t sveor3[_s8](svint8_t op1, svint8_t op2, svint8_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<UInt16>, Vector<UInt16>, Vector<UInt16>) |
svuint16_t sveor3[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<UInt32>, Vector<UInt32>, Vector<UInt32>) |
svuint32_t sveor3[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| Xor(Vector<UInt64>, Vector<UInt64>, Vector<UInt64>) |
svuint64_t sveor3[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3) EOR3 Ztied1.D, Ztied1.D, Zop2.D, Zop3.D |
| XorRotateRight(Vector<Byte>, Vector<Byte>, Byte) |
svuint8_t svxar[_n_u8](svuint8_t op1, svuint8_t op2, uint64_t imm3) XAR Ztied1.B, Ztied1.B, Zop2.B, #imm3 |
| XorRotateRight(Vector<Int16>, Vector<Int16>, Byte) |
svint16_t svxar[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3) XAR Ztied1.H, Ztied1.H, Zop2.H, #imm3 |
| XorRotateRight(Vector<Int32>, Vector<Int32>, Byte) |
svint32_t svxar[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3) XAR Ztied1.S, Ztied1.S, Zop2.S, #imm3 |
| XorRotateRight(Vector<Int64>, Vector<Int64>, Byte) |
svint64_t svxar[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3) XAR Ztied1.D, Ztied1.D, Zop2.D, #imm3 |
| XorRotateRight(Vector<SByte>, Vector<SByte>, Byte) |
svint8_t svxar[_n_s8](svint8_t op1, svint8_t op2, uint64_t imm3) XAR Ztied1.B, Ztied1.B, Zop2.B, #imm3 |
| XorRotateRight(Vector<UInt16>, Vector<UInt16>, Byte) |
svuint16_t svxar[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3) XAR Ztied1.H, Ztied1.H, Zop2.H, #imm3 |
| XorRotateRight(Vector<UInt32>, Vector<UInt32>, Byte) |
svuint32_t svxar[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3) XAR Ztied1.S, Ztied1.S, Zop2.S, #imm3 |
| XorRotateRight(Vector<UInt64>, Vector<UInt64>, Byte) |
svuint64_t svxar[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3) XAR Ztied1.D, Ztied1.D, Zop2.D, #imm3 |